Radiation-aware analog circuit design via fully-automated simulation environment

Muhikanci, Omer Yusuf; Ozanoglu, Kemal; Afacan, Engín; Yelten, Mustafa Berke; Dündar, Günhan

doi:10.1016/j.vlsi.2023.01.009

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2023

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Cited by 4 publications

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“…We adopt the double exponential current model to simulate that a particle strikes a sensitive node as an SNU, so that a transient of the correct polarity can be created at a sensitive node (i.e., a positive (negative) transient is created at the drain of PMOS (NMOS) transistors) (see Fig. 6) [12]. The expression of the double exponential current is shown as follows:…”

Section: Simulationmentioning

confidence: 99%

Design of A Highly Reliable and Low-Power SRAM With Double-Node Upset Recovery for Safety-critical Applications

Yan,

Xiang,

Huang

et al. 2023

2023 IEEE International Test Conference in Asia (ITC-Asia)

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For high-speed operations, low power consumption and small silicon area, transistors are being scaled aggressively. Meanwhile, circuit reliability is facing greater challenges in advanced technologies. In this paper, a highly reliable and lowpower SRAM with double-node-upset (DNU) recovery, namely HRLP16T, is proposed for safety-critical fields. HRLP16T can recover from single-node-upset (SNU) at all the sensitive nodes, and it has eight node pairs recover from DNUs. Simulationbased evaluation results demonstrate advantages in terms of delay and power consumption over epical existing SRAM cell designs.

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Section: Simulationmentioning

confidence: 99%