2014 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC) 2014
DOI: 10.1109/recosoc.2014.6861367
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Reconciling performance and predictability on a many-core through off-line mapping

Abstract: Abstract-We start from a general-purpose many-core architecture designed for average-case performance and ease of use. In particular, its distributed shared memory programming model allows the use of a code generation flow based on the (unmodified) gcc compiler chain. We modify this architecture and extend the code generation flow to allow the construction of efficient hard real-time systems starting from dependent task specifications. We rely on a static (off-line) real-time scheduling paradigm welladapted to… Show more

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