Reconfigurable van der Waals Junction Field Effect Transistor with Anchored Threshold and Enhanced Subthreshold Swing for Complementary Logic

Abstract

The emergence of reconfigurable field effect transistors has introduced a more efficient method for realizing reconfigurable circuits, significantly lowering hardware overhead and enhancing versatility. However, these devices often suffer from asymmetric transfer curves, impacting logic gate performance and reliability. This work investigates the use of the van der Waals junction field effect transistor (JFET) for reconfigurable circuit applications. We present a reconfigurable JFET realized through WSe 2 /MoS 2 van der Waals integrated heterojunctions with an optimized polarity gate design that effectively addresses the issues of unmatched threshold voltages between n-and p-FETs while also anchoring threshold voltages and reducing subthreshold swing. A complementary reconfigurable JFET inverter with the proposed gate design was demonstrated, showcasing excellent switching characteristics, symmetric transfer characteristics, and reduced power consumption, achieving a noise margin of 96.3% and a high gain of 153.82. The study further demonstrates the construction of reconfigurable NOR/NAND and XOR/XNOR logic gates with symmetric profiles and sharp switching, underscoring the versatility and effectiveness of the proposed approach. These findings highlight the potential of WSe 2 /MoS 2 JFETs in advancing low-power, high-performance, reconfigurable electronic circuits within the CMOS framework. KEYWORDS: junction field effect transistor (JFET), tungsten diselenide (WSe 2 ), reconfigurable field effect transistor (RFET), transition metal dichalcogenides (TMDCs), van der Waals heterojunctions