Reliable Communications Using FPGAs in High-Radiation Environments - Part I: Characterization

Pratt, B.; Fuller, Megan M.; Rice, Michael; Wirthlin, Michael

doi:10.1109/icc.2010.5502571

Cited by 3 publications

(4 citation statements)

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“…Table 3 shows the results of these experiments. The results are presented as in a previous paper [19], categorizing the SEUs into four classes, as explained in Section 4.3.…”

Section: Reduced Threshold Experimentsmentioning

confidence: 95%

“…We divided the upsets into what we consider to be four types of effects [19]. We label these SEU categories "Class 1 SEU" through "Class 4 SEU.…”

Section: Seu Classesmentioning

confidence: 99%

“…In previous work, T h was set to the maximum estimation error, max to ensure that the false detection upset case did not occur [11,19]. If the probability of a false detection event, Pr(FD), is sufficiently small, however, it may be desirable to lower T h to allow some false positive events.…”

Section: False Positive Error Eventsmentioning

confidence: 99%

“…In previous work, T h was set to the maximum estimation error, max , as suggested by Shim et al [11] and as used in [19]. Shim's T h value is the optimal value in the general case, where the probability distribution of the estimation error signal is unknown.…”

Section: Threshold Selectionmentioning

confidence: 99%

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Reduced-Precision Redundancy on FPGAs

Pratt

Fuller

Wirthlin

2011

International Journal of Reconfigurable Computing

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Reduced-precision redundancy (RPR) has been shown to be a viable alternative to triple modular redundancy (TMR) for digital circuits. This paper builds on previous research by offering a detailed analysis of the implementation of RPR on FPGAs to improve reliability in soft error environments. Example implementations and fault injection experiments demonstrate the cost and benefits of RPR, showing how RPR can be used to improve the failure rate by up to 200 times over an unmitigated system at costs less than half that of TMR. A novel method is also presented for improving the error-masking ability of RPR by up to 5 times at no additional hardware cost under certain conditions. This research shows RPR to be a very flexible soft error mitigation technique and offers insight into its application on FPGAs.

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“…Table 3 shows the results of these experiments. The results are presented as in a previous paper [19], categorizing the SEUs into four classes, as explained in Section 4.3.…”

Section: Reduced Threshold Experimentsmentioning

confidence: 95%

“…We divided the upsets into what we consider to be four types of effects [19]. We label these SEU categories "Class 1 SEU" through "Class 4 SEU.…”

Section: Seu Classesmentioning

confidence: 99%

Section: False Positive Error Eventsmentioning

confidence: 99%

Section: Threshold Selectionmentioning

confidence: 99%

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