Resource abstraction and data placement for distributed hybrid memory pool

Chen, Tingting; Liu, Haikun; Liao, Xiaofei; Jin, Hai

doi:10.1007/s11704-020-9448-7

Cited by 9 publications

(3 citation statements)

References 31 publications

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“…All memory resources are shared in a global memory space. There have been a few preliminary studies on using NVMMs in datacenter and cloud environments [49,126,127] . A new trend of using PM is to manage it as disaggregated memory, like traditional disaggregated storage systems.…”

Section: Research Directionsmentioning

confidence: 99%

A Survey of Non-Volatile Main Memory Technologies: State-of-the-Arts, Practices, and Future Directions

Liu

Chen

Jin

et al. 2021

J. Comput. Sci. Technol.

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Non-Volatile Main Memories (NVMMs) have recently emerged as a promising technology for future memory systems. Generally, NVMMs have many desirable properties such as high density, byte-addressability, non-volatility, low cost, and energy efficiency, at the expense of high write latency, high write power consumption, and limited write endurance. NVMMs have become a competitive alternative of Dynamic Random Access Memory (DRAM), and will fundamentally change the landscape of memory systems. They bring many research opportunities as well as challenges on system architectural designs, memory management in operating systems (OSes), and programming models for hybrid memory systems. In this article, we first revisit the landscape of emerging NVMM technologies, and then survey the state-of-the-art studies of NVMM technologies. We classify those studies with a taxonomy according to different dimensions such as memory architectures, data persistence, performance improvement, energy saving, and wear leveling. Second, to demonstrate the best practices in building NVMM systems, we introduce our recent work of hybrid memory system designs from the dimensions of architectures, systems, and applications. At last, we present our vision of future research directions of NVMMs and shed some light on design challenges and opportunities.

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Section: Research Directionsmentioning

confidence: 99%

A Survey of Non-Volatile Main Memory Technologies: State-of-the-Arts, Practices, and Future Directions

Liu

Chen

Jin

et al. 2021

J. Comput. Sci. Technol.

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“…Memory access optimization : For most programs, memory access 36 occupies more or less a part of the time overhead. At present, most researchers have different ways to optimize it.…”

Section: Background and Related Workmentioning

confidence: 99%

PAS: A new powerful and simple quantum computing simulator

et al. 2021

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In recent years, many researchers have been using CPU for quantum computing simulation. However, in reality, the simulation efficiency of the large‐scale simulator is low on a single node. Therefore, striving to improve the simulator efficiency on a single node has become a serious challenge that many researchers need to solve. After many experiments, we found that much computational redundancy and frequent memory access are important factors that hinder the efficient operation of the CPU. This paper proposes a new powerful and simple quantum computing simulator: PAS (power and simple). Compared with existing simulators, PAS introduces four novel optimization methods: efficient hybrid vectorization, fast bitwise operation, memory access filtering, and quantum tracking. In the experiment, we tested the QFT (quantum Fourier transform) and RQC (random quantum circuits) of 21 to 30 qubits and selected the state‐of‐the‐art simulator QuEST (quantum exact simulation toolkit) as the benchmark. After experiments, we have concluded that PAS compared with QuEST can achieve a mean speedup of 8.69× (QFT), 2.62× (RQC) (up to 10.76×, 4.87×) on the Intel Xeon E5‐2670 v3 CPU.

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“…Many studies propose utilizing both DRAM and NVM in hybrid memory systems [11][12][13]. There are mainly two architectures to manage DRAM and NVM.…”

Section: Introductionmentioning

confidence: 99%

Transformer: An OS-Supported Reconfigurable Hybrid Memory Architecture

et al. 2022

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Non-volatile memories (NVMs) have aroused vast interest in hybrid memory systems due to their promising features of byte-addressability, high storage density, low cost per byte, and near-zero standby energy consumption. However, since NVMs have limited write endurance, high write latency, and high write energy consumption, it is still challenging to directly replace traditional dynamic random access memory (DRAM) with NVMs. Many studies propose to utilize NVM and DRAM in a hybrid memory system, and explore sophisticated memory management schemes to alleviate the impact of slow NVM on the performance of applications. A few studies architected DRAM and NVM in a cache/memory hierarchy. However, the storage and performance overhead of the cache metadata (i.e., tags) management is rather expensive in this hierarchical architecture. Some other studies architected NVM and DRAM in a single (flat) address space to form a parallel architecture. However, the hot page monitoring and migration are critical for the performance of applications in this architecture. In this paper, we propose Transformer, an OS-supported reconfigurable hybrid memory architecture to efficiently use DRAM and NVM without redesigning the hardware architecture. To identify frequently accessed (hot) memory pages for migration, we propose to count the number of page accesses in OSes by sampling the access bit of pages periodically. We further migrate the identified hot pages from NVM to DRAM to improve the performance of hybrid memory system. More importantly, Transformer can simulate a hierarchical hybrid memory architecture while DRAM and NVM are physically managed in a flat address space, and can dynamically shift the logical memory architecture between parallel and hierarchical architectures according to applications’ memory access patterns. Experimental results show that Transformer can improve the application performance by 62% on average (up to 2.7×) compared with an NVM-only system, and can also improve performance by up to 79% and 42% (21% and 24% on average) compared with hierarchical and parallel architectures, respectively.

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Resource abstraction and data placement for distributed hybrid memory pool

Cited by 9 publications

References 31 publications

A Survey of Non-Volatile Main Memory Technologies: State-of-the-Arts, Practices, and Future Directions

A Survey of Non-Volatile Main Memory Technologies: State-of-the-Arts, Practices, and Future Directions

PAS: A new powerful and simple quantum computing simulator

Transformer: An OS-Supported Reconfigurable Hybrid Memory Architecture

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