RETRACTED ARTICLE: A Novel Adaptive Current Control Technique Based Modified MOS Current Mode Logic Circuits for Low Power and Area Efficient

Abstract

MOS current mode logic (MCML) is one of the most promising logic functions to counteract power analysis attacks. The static power MCML standard cells are significantly higher than the static CMOS logic to achieve an equivalent function. As a result, using such logical patterns is very limited in portable devices. The strange thing is that these devices are the most sensitive to physical attacks, which will benefit more people from passing MCML. The propose to overcome this limitation by significantly reducing the static power consumption of MCML-based full adder circuits. For this reason, current control by adaptive (ACCT) -MCML standard cell library is provided in each transistor cell suspension. The effect of sleep transistors on performance and area is negligible. In addition, the proposed difference library is compatible with Micro wind tools. The integrated real-time digital signal processing application, where the drive current must be high. The conventional design will have a low-efficiency supply voltage with low capacitance; even when operating, the circuit speed will be faster, and the delay will be high. So the proposed 14 T full adder based integrated circuit and adder are based on ACCT, which High power consumption, which has become an essential standard operation for the design of energy-efficient dedicated circuits, has become the primary function and compact device design, possible output. The coefficient plays a significant role in planning energy-saving processors and determining processor performance. Especially, the switching behavior is to diminish the power consumption of the design MCML full ladder logic. However, the performance of the circuit is less than the full adder binary logic. The proposed circuit's correctness and effectiveness are verified by Micro wind with a proposed MCML process of 0.13 μm and a power supply voltage of 4.2 V.