New silicon CMOS processes developed primarily for the burgeoning wireless networking market offer significant promise as a vehicle for the implementation of highly integrated receivers, especially at the lower end of the frequency range proposed for the Square Kilometre Array (SKA). An RF-CMOS 'Receiver-on-a-Chip' is being developed as part of an Australia Telescope program looking at technologies associated with the SKA. The receiver covers the frequency range 500-1700 MHz, with instantaneous IF bandwidth of 500 MHz and, on simulation, yields an input noise temperature of <50 K at mid-band. The receiver will contain all active circuitry (LNA, bandpass filter, quadrature mixer, anti-aliasing filter, digitiser and serialiser) on one 0.18 µm RF-CMOS integrated circuit. This paper outlines receiver front-end development work undertaken to date, including design and simulation of an LNA using noise cancelling techniques to achieve a wideband input-power-match with little noise penalty.