Robust Phase Estimation of a Hybrid Monte Carlo/Finite Memory Digital Phase-Locked Loop

Abstract

Digital phase-locked loops (DPLLs) have been designed in a number of ways to correctly generate pulse signals in various systems. However, the existing DPLLs have poor acquisition performance or are prone to the divergence phenomenon when modeling and/or round-off errors exist and the noise statistics are incorrect. In this paper, we propose a novel DPLL whose phase estimator is designed in hybrid form that utilizes the advantages of Monte Carlo estimation, which is robust to nonlinear effects such as measurement quantization, and a finite memory estimator, which is robust against incorrect noise information and system model mismatch. The robustness of the proposed hybrid Monte Carlo/finite memory DPLL is demonstrated by comparing its phase estimation performance via a numerical example. key words: digital phase-locked loop, Monte Carlo estimation, finite memory estimation, hybrid estimation