Room-temperature single dopant atom quantum dot transistors in silicon, formed by field-emission scanning probe lithography

Durrani, Z. A. K.; Jones, Mervyn; Abualnaja, Faris; Wang, Chen; Kaestner, Marcus; Lenk, Steve; Lenk, Claudia; Rangelow, Ivo W.; Andreev, A. D.

doi:10.1063/1.5050773

Cited by 30 publications

(35 citation statements)

References 58 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…1(d)]. A geometric oxidation process [7,13,19] then both separates these contact regions by forming a SiO 2 tunnel junction at the point contact and leaves an array of isolated dopant atoms within the SiO 2 tunnel junction [ Fig. 1(e)]; this is shown in greater detail in Fig.…”

Section: Fabricationmentioning

confidence: 99%

“…Dopant atoms within a wide-band-gap semiconductor or insulator can form deep-level states, where the quantum well depth may increase to about 1 eV or even larger [19,20]. However, such an atomic structure may be strongly isolated, reducing tunnel coupling [8,21] to source and drain electron reservoirs and other QDs, and limiting electrostatic control of energy states, thereby preventing QD transistor operation.…”

Section: Introductionmentioning

confidence: 99%

“…Ideally, an atomic-scale nanoelectronic circuit using multiple single-atom transistor elements would require control over both tunnel coupling and the device energy states. Recently, we measured RT "Coulomb diamond" single-electron charging characteristics, as a function of a single gate voltage, in a P dopant-atom QD transistor, where the P atom was embedded within a Si/SiO 2 /Si tunnel junction [13,19]. In this structure, it is possible to observe both resonant tunneling and Coulomb diamond single-electron charging effects through an atomic-scale P QD placed between large source and drain regions and switching of the tunnel current by an electrostatically coupled gate.…”

Section: Introductionmentioning

confidence: 99%

“…Device operation is thus limited to cryogenic temperatures only. While this is not a restriction for spectroscopic investigations of atomic states using electron tunneling [4], or for the definition of spin qubits using phosphorous (P) dopant atoms in silicon [17,18], the lack of RT operation prevents wider more general nanoelectronic logic, memory, or sensor applications.Confining dopant atoms using tunnel barriers with heights that are considerably greater than those of the thermal fluctuations, k B T = 25 meV at RT = 290 K, can enable the formation of RT single-atom transistors [19].…”

mentioning

confidence: 99%

“…Confining dopant atoms using tunnel barriers with heights that are considerably greater than those of the thermal fluctuations, k B T = 25 meV at RT = 290 K, can enable the formation of RT single-atom transistors [19].…”

mentioning

confidence: 99%

See 4 more Smart Citations

Room-Temperature Measurement of Electrostatically Coupled, Dopant-Atom Double Quantum Dots in Point-Contact Transistors

et al. 2019

Self Cite

View full text Add to dashboard Cite

The reduction of nanoelectronic devices to sub-10 nm sizes raises the prospect of electronics at the atomic scale, while also facilitating studies on nanoscale device physics. Single-atom transistors, where the current-switching element is formed by one atom and the information packet size is reduced to one electron, can create electronic switches scaled to their ultimate physical limits. Hitherto, single-atom transistor operation has been limited to low temperatures due to shallow quantum wells, which inhibit room-temperature nanoelectronic applications. Furthermore, the interaction between multiple single-atom elements at room temperature has yet to be demonstrated. Here, we show that quantum interactions between P dopants in Si/SiO 2 /Si single-atom transistors lead to room-temperature double quantum dot behavior. Hexagonal regions of charge stability and gate-controlled tunnel coupling between P atoms are observed at room temperature. Image processing is used to help reduce observer bias in data analysis. Single-electron device simulation is used to investigate evolution of the charge-stability region with varying capacitance and resistance. In combination with extracted tunnel capacitances and resistances, this allows experimental trends to be reproduced and provides information on the dopant-atom arrangement.At present, most single-atom transistors use donor [3,4,[9][10][11][12][13][14][15][16] and acceptor [1,2] substitutional impurity atoms within the Si channel of a field-effect transistor or single atoms deposited on atomically flat surfaces by scanning probe methods [4]. In these devices, electronic states associated with individual dopant-atom QDs [1,3,9,10] and with electrostatically coupled double QDs within a dopantatom array [14][15][16] are measured and interactions between dopant-atom arrays formed by single-ion implantation methods [11] are characterized. However, such approaches rely on shallow, about 10-50 meV in depth, potential wells [3], which are insufficient to confine electrons at room temperature (RT). Device operation is thus limited to cryogenic temperatures only. While this is not a restriction for spectroscopic investigations of atomic states using electron tunneling [4], or for the definition of spin qubits using phosphorous (P) dopant atoms in silicon [17,18], the lack of RT operation prevents wider more general nanoelectronic logic, memory, or sensor applications.Confining dopant atoms using tunnel barriers with heights that are considerably greater than those of the thermal fluctuations, k B T = 25 meV at RT = 290 K, can enable the formation of RT single-atom transistors [19].

show abstract

Section: Fabricationmentioning

confidence: 99%