Run-time Adaptation for Reconfigurable Embedded Processors

Bauer, Lars; Henkel, Jörg

doi:10.1007/978-1-4419-7412-9

Cited by 5 publications

(2 citation statements)

References 78 publications

(151 reference statements)

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“…Current FPGAs already fit incredibly well into the near future design trends [3]. Firstly, due to the increased hardware resources that these platforms have made available to system designers, thus significantly increasing the available computational power.…”

Section: B Current Trends In Embedded Systems Designmentioning

confidence: 99%

High throughput and scalable architecture for unified transform coding in embedded H.264/AVC video coding systems

Dias

López²,

Roma

et al. 2011

2011 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation

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An innovative high throughput and scalable multitransform architecture for H.264/AVC is presented in this paper. This structure can be used as a hardware accelerator in modern embedded systems to efficiently compute the 4×4 forward/inverse integer DCT, as well as the 2-D 4 × 4 / 2 × 2 Hadamard transforms. Moreover, its highly flexible design and hardware efficiency allows it to be easily scaled in terms of performance and hardware cost to meet the specific requirements of any given video coding application. Experimental results obtained using a Xilinx Virtex-4 FPGA demonstrate the superior performance and hardware efficiency levels provided by the proposed structure, which presents a throughput per unit of area at least 1.8× higher than other similar recently published designs. Furthermore, such results also showed that this architecture can compute, in realtime, all the above mentioned H.264/AVC transforms for video sequences with resolutions up to UHDV.

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Section: B Current Trends In Embedded Systems Designmentioning

confidence: 99%

High throughput and scalable architecture for unified transform coding in embedded H.264/AVC video coding systems

Dias

López²,

Roma

et al. 2011

2011 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation

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“…In [12], coarse-grained reconfigurable architectures are discussed, but reconfigurable processors are not provided a detailed treatment. Recently, a book with focus on run-time adaptation by Bauer and Henkel [15] and a book emphasizing high-level modeling approach for reconfigurable processors by Chattopadhyay et al [16] are published.…”

Section: Related Surveysmentioning

confidence: 99%

Ingredients of Adaptability: A Survey of Reconfigurable Processors

Chattopadhyay

2013

VLSI Design

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For a design to survive unforeseen physical effects like aging, temperature variation, and/or emergence of new application standards, adaptability needs to be supported. Adaptability, in its complete strength, is present in reconfigurable processors, which makes it an important IP in modern System-on-Chips (SoCs). Reconfigurable processors have risen to prominence as a dominant computing platform across embedded, general-purpose, and high-performance application domains during the last decade. Significant advances have been made in many areas such as, identifying the advantages of reconfigurable platforms, their modeling, implementation flow and finally towards early commercial acceptance. This paper reviews these progresses from various perspectives with particular emphasis on fundamental challenges and their solutions. Empowered with the analysis of past, the future research roadmap is proposed.

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