Selective harmonic elimination in multilevel inverter using hybrid APSO algorithm

Memon, Mudasir Ahmed; Mekhilef, Saad; Mubin, Marizan

doi:10.1049/iet-pel.2017.0486

Cited by 89 publications

(68 citation statements)

References 29 publications

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“…In SVPWM, the complexity of the algorithm increases as the number of levels at the output increases. Likewise, with SHEPWM, the calculation of switching angles becomes more and more complex with increases in the number of levels [29][30][31][32]. The nearest level control (NLC) is a low-switching-frequency PWM technique [33].…”

Section: Nearest Level Control Modulation Methodsmentioning

confidence: 99%

Design and Implementation of a Hybrid Single T-Type Double H-Bridge Multilevel Inverter (STDH-MLI) Topology

et al. 2019

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Multilevel inverters are proficient in achieving a high-quality staircase output voltage waveform with a lower amount of harmonic content. In this paper, a new hybrid multilevel inverter topology based on the T-type and H-bridge module is presented. The proposed topology aims to achieve a higher number of levels utilizing a lower number of switches, direct current (dc) voltage sources, and voltage stresses across different switches. The basic unit of the proposed single T-type and double H-bridge multilevel inverter (STDH-MLI) produces 15 levels at the output using three dc voltage sources. The proposed topology can be extended by connecting a larger number of dc voltage sources in the T-type section. The nearest level control (NLC) switching technique is used to generate gate pulses for switches to achieve a high-quality output voltage waveform. In addition, a simplified way to achieve NLC is also described in the paper. A detailed comparison with other similar topologies is provided to set the benchmark of the proposed topology. Finally, experimental work is carried out to validate the performance of the proposed topology.

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Section: Nearest Level Control Modulation Methodsmentioning

confidence: 99%

Design and Implementation of a Hybrid Single T-Type Double H-Bridge Multilevel Inverter (STDH-MLI) Topology

et al. 2019

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“…using the PSO method as described in [28]. The feasible solutions that eliminate unwanted harmonics do not exist for the whole range of MI.…”

Section: Shepwm Techniquementioning

confidence: 99%

A New Configurable Topology for Multilevel Inverter With Reduced Switching Components

et al. 2020

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Multilevel inverters (MLI) are now becoming an important element for medium-voltage highpower applications. A low switch count MLIs are more popular due to their high efficiency, low cost, and easy control for the output having a higher number of levels. A new MLI topology for single-phase applications based on switched dc voltage source with reduced switch count is proposed in the paper. The presented topology is developed with the constraints of lesser blocking voltage of the switches with a higher number of levels at the output using a lower number of components. The proposed topology can also work in the symmetrical and asymmetrical configuration. Selective harmonic elimination (SHE) technique is applied to synthesize the staircase output voltages with eliminations of lower order harmonics by optimized computation of angles for switching operation. The comparative studies with the MLIs recommended in recent times show the importance of the proposed MLI structure in terms of reduced switch count and lower voltage stresses across switches in both asymmetrical and symmetrical configurations. The experimental results are presented to confirm the performance of the proposed topology.

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“…LGU PCU Where V1 is the fundamental component of the output voltage and Vi is the i th harmonic voltage. Selective harmonic elimination (SHE) modulation technique demonstration superior performance due to its capability of eliminating lower order harmonics [16]. For 13 level output voltage, five harmonic voltages can be eliminated.…”

Section: Selective Harmonic Elimination (She) Modulation Techniquementioning

confidence: 99%

SHEPWM Based New Hybrid Multilevel Inverter Topology with Reduced Switch Count

Siddique

Mekhilef

Shah

et al. 2019

2019 21st European Conference on Power Electronics and Applications (EPE '19 ECCE Europe)

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In this paper, a new single-phase hybrid multilevel inverter topology is proposed with reduced switch count. The basic unit of the proposed topology is capable of generating 13 levels at the output. A higher number of levels can be generated by extending the basic unit. Two different extensions of the basic unit have been proposed in the paper. The topology consists of a level generation unit (LGU) and the polarity changing unit (PCU). The level generation unit of the proposed topology is based on the series connection of multiple switched dc voltage sources with half and full bridge configurations. Selective Harmonic Elimination PWM (SHEPWM) based switching control technique has been employed for an improved harmonic spectrum. Performance and effectiveness of the proposed topology with the employed SHEPWM control have been substantiated by simulation results and verified by experimental results obtained from a laboratory prototype.

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Selective harmonic elimination in multilevel inverter using hybrid APSO algorithm

Cited by 89 publications

References 29 publications

Design and Implementation of a Hybrid Single T-Type Double H-Bridge Multilevel Inverter (STDH-MLI) Topology

Design and Implementation of a Hybrid Single T-Type Double H-Bridge Multilevel Inverter (STDH-MLI) Topology

A New Configurable Topology for Multilevel Inverter With Reduced Switching Components

SHEPWM Based New Hybrid Multilevel Inverter Topology with Reduced Switch Count

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