Semiconductor Package Thermal Impedance Extraction for Modelica Thermal Network Simulation Combined with VHDL-AMS model

Abstract

Because of the emerging market demand for higher power with higher efficiency for the power semiconductor devices, thermal design of the semiconductor package and its cooling method has become one of the key elements for the power supply systems in power electric design. Thus, many thermal designers now require the junction-to-case thermal Impedance ZθJC since it is one of the most important thermal characteristics of semiconductor devices and thus, in November 2010, the more reliable and sufficiently reproducible measurement method without a case temperature measurement has been standardized by JEDEC as JESD 51-14 (https://www.jedec.org/standardsdocuments/docs/jesd51-14-0) Figure 8. Mechanical mass/spring/damping component models with different combinations by Modelica-to-VHDL-AMS interface port Figure 9. Combination of Modelica and VHDL-AMS thermal network components compared with full Modelica network model