Simulation of ESD Thermal Failures and Protection Strategies on System Level

Scheier, Stanislav; Nieden, Friedrich zur; Arndt, Bastian; Frei, Stephan

doi:10.1109/temc.2015.2442623

Cited by 8 publications

(1 citation statement)

References 15 publications

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“…In addition, IC chips must also withstand electrostatic discharge (ESD), which is an instantaneous high voltage surge [4]. ESD protection is very important and its evaluation methods have been discussed [5]- [8]. ESD guns emulate ESD waveforms to reproduce real-world ESD discharges, as mimicking the instantaneous discharge of electrical charges on humans and devices, causing highvoltage fluctuations to the device under test (DUT) system.…”

Section: Introductionmentioning

confidence: 99%

Experimental Exploration of the Backside ESD Impacts on an IC Chip in Flip Chip Packaging

Wadatsumi

Kawai

Hasegawa

et al. 2023

IEICE Trans. Electron.

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This paper presents on-chip characterization of electrostatic discharge (ESD) impacts applied on the Si-substrate backside of a flip-chip mounted integrated circuit (FC-IC) chip. An FC-IC chip has an open backside and there is a threat of reliability problems and malfunctions caused by the backside ESD. We prepared a test FC-IC chip and measured Si-substrate voltage fluctuations on its frontside by an on-chip monitor (OCM) circuit. The voltage surges as large as 200 mV were observed on the frontside when a 200-V ESD gun was irradiated through a 5 kΩ contact resistor on the backside of a 350 µm thick Si substrate. The distribution of voltage heights was experimentally measured at 20 on-chip locations among thinned Si substrates up to 40 µm, and also explained in full-system level simulation of backside ESD impacts with the equivalent models of ESD-gun operation and FC-IC chip assembly.

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Section: Introductionmentioning

confidence: 99%