Simulation of modern parallel systems

Panda, Dhabaleswar K.; Basak, Debashis; Dai, Donglai; Kesavan, Ram; Sivaram, R.; Banikazemi, Mohammad; Moorthy, Vijay

doi:10.1145/268437.268734

Cited by 14 publications

(5 citation statements)

References 2 publications

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“…We carried out experiments using a C++/CSIM based simulation testbed [12] which models cut-through routing on a flit by flit basis. A bidirectional Multistage Interconnection Network (BMIN) based parallel system was assumed for our experiments and various synthetic workloads were used to evaluate the influence of the different system parameters on performance.…”

Section: Methodsmentioning

confidence: 99%

HIPIQS: a high-performance switch architecture using input queuing

Sivaram¹,

Stunkel

Panda

2002

IEEE Trans. Parallel Distrib. Syst.

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Switch-based interconnects are used in a number of application domains including parallel system interconnects, local area networks, and wide area networks. However, very few switches have been designed that are suitable for more than one of these application domains. Such a switch must offer both extremely low latency and very high throughput for a variety of different message sizes. While some architectures with output queuing have been shown to perform extremely well in terms of throughput, their performance can suffer when used in systems where a significant portion of the packets are extremely small. On the other hand, architectures with input queuing offer limited throughput, or require fairly complex and centralized arbitration that increases latency. In this paper we present a new input queue-based switch architecture called HIPIQS (HIgh-Performance Input-Queued Switch). It offers low latency for a range of message sizes, and provides throughput comparable to that of output queuing approaches. Furthermore, it allows simple and distributed arbitration. HIPIQS uses a dynamically allocated multi-queue organization, pipelined access to multi-bank input buffers, and small cross-point buffers, to deliver high performance. Our simulation results show that HIPIQS can deliver performance close to that of output queuing approaches over a range of message sizes, system sizes, and traffic. The switch architecture can therefore be used to build high performance switches that are useful for both parallel system interconnects and for building computer networks.

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Section: Methodsmentioning

confidence: 99%

HIPIQS: a high-performance switch architecture using input queuing

Sivaram¹,

Stunkel

Panda

2002

IEEE Trans. Parallel Distrib. Syst.

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“…This design choice introduces all the drawbacks discussed in the background section 2.1. Due to the similarity between the two programming interfaces, the wide literature on the development of CSIM simulation models (Schwetman, 1988;Edwards and Sankar, 1992;Panda et al, 1997;Dogan, 2009) can also be used as reference by JADES users. Figure 1 shows the class diagram of the simulator.…”

Section: Jades Designmentioning

confidence: 99%

Concurrent simulation in the cloud with the mJADES framework

Cuomo

Rak

Villano

2013

IJSPM

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In this paper we discuss the design and implementation of mJADES, a new simulation engine that runs on top of an ad-hoc federation of cloud providers and is designed to perform multiple concurrent simulations. These features make mJADES an attractive environment for the simulation of complex systems, in which it is often desiderable to perform many simulation runs, either for statistical validation or to compare the system behavior in several di↵erent conditions. Given a set of simulation tasks, mJADES is able automatically to acquire the computing resources needed from the cloud and to distribute the simulation runs to be executed. . His research activities focus on performance evaluation and prediction of parallel and distributed computer systems, including Cloud Computing, Grid Computing and their integration, with special attention to simulative prediction techniques. His scientific activity is mainly focused on the analysis and design of High Performance System Architectures and on methodologies and techniques for distributed software development.Umberto Villano is full professor at the University of Sannio at Benevento, Italy, where he is Director of the Department of Engineering. His major research interests concern performance prediction and analysis of parallel and distributed computer architectures, tools and environments for parallel programming and distributed algorithms. He received the Laurea degree in Electronic Engineering cum laude from the University of Naples in 1983.In the last few years, cloud computing (Peter Mell and Tim Grance, 2009) has proven to be a convenient paradigm for structuring and deploying applications and infrastructures. The elastic nature of the cloud paradigm, together with the "everything as a service" philosophy mutuated from the Service Oriented Architecture (SOA) methodology, has promoted its use

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“…Code-block times are obtained from counting instructions using the same assembly-augmentation used by the shared-memory simulation environments. WORMulSim [20] adds an MPI-compliant interface to the network communication calls so that the user's code is portable between the simulator and real testbeds. The pSNOW environment [21] for simulation of workstation clusters is much the same except the user's code makes its network calls with Active Messages.…”

Section: Related Workmentioning

confidence: 99%

An Integrated Simulation Environment for Parallel and Distributed System Prototying

et al. 1999

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The process of designing parallel and distributed computer systems requires predicting performance in response to given workloads. The scope and inter action of applications, operating systems, communi cation networks, processors, and other hardware and software lead to substantial system complexity. De velopment of virtual prototypes in lieu of physical prototypes can result in tremendous savings, espe cially when created in concert with a powerful model development tool. When high-fidelity models of par allel architectures are coupled with workloads gener ated from real parallel application code in an execu tion-driven simulation, the result is a potent design and analysis tool for parallel hardware and software alike. This paper introduces the concepts, mechanisms, and results of an Integrated Simulation Environment (ISE) that makes possible the rapid virtual prototyping and profiling of legacy and prototype parallel process ing algorithms, architectures, and systems using a networked cluster of workstations. Performance re sults of virtual prototypes in ISE are shown to faith fully represent those of an equivalent hardware con figuration, and the benefits of ISE for predicted per formance comparisons are illustrated by a case study.

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Simulation of modern parallel systems

Cited by 14 publications

References 2 publications

HIPIQS: a high-performance switch architecture using input queuing

HIPIQS: a high-performance switch architecture using input queuing

Concurrent simulation in the cloud with the mJADES framework

An Integrated Simulation Environment for Parallel and Distributed System Prototying

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