Single-chip 4K 60fps 4:2:2 HEVC video encoder LSI with 8K scalability

Onishi, Takayuki; Sano, Takashi; Nishida, Yukikuni; Yokohari, Kazuya; Su, Jia; Nakamura, Ken; Nitta, Koyo; Kawashima, Kimiko; Okamoto, Jun; Kusaba, Ritsu; Sagata, Atsushi; Iwasaki, Hiromichi; Ikeda, Mitsuo; Shimizu, Atsushi

doi:10.1109/vlsic.2015.7231325

Cited by 12 publications

(6 citation statements)

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“…Since HEVC was standardized, real-time HEVC codecs have been released by many companies such as MainConcept (MainConcept HEVC), Huawei (HW265), Tencent (Tencent V265), Nanjing Yunyan (sz265), and ByteDance (Bytedance V265) [34]. In addition, many commercial [35]- [37] and academic [38]- [40] hardware implementations for up to 4K120p format have been published. Nowadays, a hardware HEVC codec is an integral component in many state-of-the-art video cameras, smartphones, tablets, TVs, PCs, and gaming consoles.…”

Section: A Existing Real-time Hevc Video Codecsmentioning

confidence: 99%

Comparative Rate-Distortion-Complexity Analysis of VVC and HEVC Video Codecs

et al. 2021

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Versatile Video Coding (VVC/H.266) is the next-generation international video coding standard and a successor to the widespread High Efficiency Video Coding (HEVC/H.265). This paper analyzes the rate-distortion-complexity characteristics of the VVC reference software (VTM10.0) by using HEVC reference software (HM16.22) as an anchor. In this independent study, the rate-distortion performance of VTM was benchmarked against HM with the objective PSNR, SSIM, and VMAF quality metrics and the associated encoder and decoder complexities were profiled at function level using Intel VTune Profiler on Intel Xeon E5-2699 v4 22-core processors. For a fair comparison, all our experiments were conducted under the VTM common test conditions (CTC) that define 10-bit configurations of the VTM codec for the addressed All Intra (AI), Random Access (RA), and Low Delay B (LB) conditions. The VTM CTC test set was also extended with complementary 4K UHD sequences to elaborate RD characteristics with higher resolutions. According to our evaluations, VTM improves the average coding efficiency over HM, depending on quality metric, by 23.0-23.9% under the AI condition, 33.1-36.6% under the RA condition, and 26.7-29.5% under the LB condition. However, the coding gain of VTM comes with 34.0×, 8.8×, and 7.5× encoding complexity over that of HM under the AI, RA, and LB conditions, respectively. The corresponding overhead of the VTM decoder stays steady at 1.8× across all conditions. This study also pinpoints the most complex parts of the VTM codec and discusses practical implementation aspects of prospective real-time VVC encoders and decoders.INDEX TERMS Common test conditions (CTC), HEVC test model (HM), High Efficiency Video Coding (HEVC), objective quality analysis, performance profiling, rate-distortion-complexity (RDC), UVG dataset, Versatile Video Coding (VVC), video codec, VVC test model (VTM). I. INTRODUCTIONUR society is surrounded by a myriad of media applications where digital video is of the essence. According to Cisco, the global IP video traffic will increase fourfold from 2017 and account for 82% of all IP traffic by 2022 [1]. Moreover, Comcast estimates that the prevailing COVID-19 crisis has increased Voice over Internet Protocol (VoIP) and videoconferencing by 210-285% and other video consumption by 20-40% over that of the prepandemic period [2]. This snowballing growth is mainly driven by the omnipresent connectivity and proliferation of advanced multimedia solutions that support emerging bandwidth-greedy formats like 4K/8K Ultra High Definition (UHD) or 360-degree omnidirectional videos.

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Section: A Existing Real-time Hevc Video Codecsmentioning

confidence: 99%

Comparative Rate-Distortion-Complexity Analysis of VVC and HEVC Video Codecs

et al. 2021

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“…HEVC/H.265 can reduce the bandwidth by 50% compared to the conventional H.264/advanced video codec (AVC) [7] standard. Since video compression is a very complicated process, some dedicated HEVC encoder LSIs [8]- [10], including those we developed [11]. Our dedicated HEVC encoder LSI named "NARA" [11], which originally supports real-time encoding up to 4K 60 fps in shingle chip.…”

Section: Intoroductionmentioning

confidence: 99%

“…Since video compression is a very complicated process, some dedicated HEVC encoder LSIs [8]- [10], including those we developed [11]. Our dedicated HEVC encoder LSI named "NARA" [11], which originally supports real-time encoding up to 4K 60 fps in shingle chip. By modifying NARA's firmware, we have also developed a 4K 60 fps HEVC encoder that supports high dynamic range videos [12] and a 4K 120 fps HEVC Encoder which consists of two LSIs [13].…”

Section: Intoroductionmentioning

confidence: 99%

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A Low-Latency 4K HEVC Multi-Channel Encoding System with Content-Aware Bitrate Control for Live Streaming

Kobayashi

Nakamura

Kitahara

et al. 2023

IEICE Trans. Inf. & Syst.

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This paper describes a novel low-latency 4K 60 fps HEVC (high efficiency video coding)/H.265 multi-channel encoding system with content-aware bitrate control for live streaming. Adaptive bitrate (ABR) streaming techniques, such as MPEG-DASH (dynamic adaptive streaming over HTTP) and HLS (HTTP live streaming), spread widely on Internet video streaming. Live content has increased with the expansion of streaming services, which has led to demands for traffic reduction and low latency. To reduce network traffic, we propose content-aware dynamic and seamless bitrate control that supports multi-channel real-time encoding for ABR, including 4K 60 fps video. Our method further supports chunked packaging transfer to provide low-latency streaming. We adopt a hybrid architecture consisting of hardware and software processing. The system consists of multiple 4K HEVC encoder LSIs that each LSI can encode 4K 60 fps or up to high-definition (HD) ×4 videos efficiently with the proposed bitrate control method. The software takes the packaging process according to the various streaming protocol. Experimental results indicate that our method reduces encoding bitrates obtained with constant bitrate encoding by as much as 56.7%, and the streaming latency over MPEG-DASH is 1.77 seconds.

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“…Onishi et al [104] developed the irst single-chip HEVC encoder (labeled as NARA) capable of encoding 4K resolution at 60 FPS with 4:2:2 subsampling that can also achieve 8K encoding in a multichip coniguration. This encoder was then used in future works by Kobayashi et al [76], Omori et al [103] and Omori et al [102].…”

Section: Inter-frame Compressionmentioning

confidence: 99%

Image and Video Coding Techniques for Ultra-low Latency

et al. 2022

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The next generation of wireless networks fosters the adoption of latency-critical applications such as XR, connected industry, or autonomous driving. This survey gathers implementation aspects of different image and video coding schemes and discusses their tradeoffs. Standardized video coding technologies such as HEVC or VVC provide a high compression ratio, but their enormous complexity sets the scene for alternative approaches like still image, mezzanine, or texture compression in scenarios with tight resource or latency constraints. Regardless of the coding scheme, we found inter-device memory transfers and the lack of sub-frame coding as limitations of current full-system and software-programmable implementations.

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Single-chip 4K 60fps 4:2:2 HEVC video encoder LSI with 8K scalability

Cited by 12 publications

References 1 publication

Comparative Rate-Distortion-Complexity Analysis of VVC and HEVC Video Codecs

Comparative Rate-Distortion-Complexity Analysis of VVC and HEVC Video Codecs

A Low-Latency 4K HEVC Multi-Channel Encoding System with Content-Aware Bitrate Control for Live Streaming

Image and Video Coding Techniques for Ultra-low Latency

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