Small-Signal Model of a High-Power-Factor, Three-Phase AC-DC Converter with High-Frequency Resonant Current Injection

Closed-loop control of AC/DC three-phase Current Injection Series Resonant Converter

“…The small-signal model developed in [2] allows the classical techniques of linear network and control theory to be applied in designing converter's output voltage feedback loop. The design of the compensator for the output voltage regulation is based on the open-loop control-to-output frequency response (Fig.…”

“…Figure 6 shows the Simulink block diagram of the converter with the controller used to assist the design process. The small-signal model in Figure 6 is constructed from the state-space matrix in [2]. The signal inversion (-1) is to counteract the 180° phase shift of the control-to-output transfer function at low frequency.…”

“…Nevertheless, the converter is considered to have applications in the 1-5 kW power range where high input power factor is required, but where the cost of a 6-transistor active rectifier and associated controller would be prohibitive. The steady-state analysis and characteristics of the converter were described in [1] and the small-signal model for the converter was presented for the first time by Seroji [2]. This paper presents the closed-loop design to regulate the output voltage using direct frequency control.…”

“…COMPONENT VALUES balance relations for the DC-link are used to couple the two sets of equations[2]. The resulting non-linear model is then linearised by considering small perturbations in all the variables.…”

An optimization model of the input current for a variable input voltage in CMOS AC/DC converter

“…On-chip converter with low power operation has the advantage of resulting in a high power factor. In fact, the on-chip technology may increase the operating frequency of the converter by active component and this contributes to higher switching losses [11,12]. CMOS technology from Silterra Malaysia offers the possibility of both high frequency and low switching losses through the lower length, 0.18 m CMOS technologies.…”