SMONoC: Optical network-on-chip using a statistical multiplexing strategy

Wang, Kun; Qi, Shixiong; Chen, Zheng; Yang, Yong; Gu, Huaxi

doi:10.1016/j.osn.2019.03.004

Cited by 11 publications

(3 citation statements)

References 4 publications

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“…Content may change prior to final publication. [260], while NoC wavelength routing has been studied in [261]. Moreover, recent studies have explored the thermal characteristics of ONoCs [262], the interference characteristics in optical wireless NoCs [263], and the SDN control for optical interconnects [264].…”

Section: ) Optical Interconnectsmentioning

confidence: 99%

Hardware-Accelerated Platforms and Infrastructures for Network Functions: A Survey of Enabling Technologies and Research Studies

2020

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In order to facilitate flexible network service virtualization and migration, network functions (NFs) are increasingly executed by software modules as so-called "softwarized NFs" on General-Purpose Computing (GPC) platforms and infrastructures. GPC platforms are not specifically designed to efficiently execute NFs with their typically intense Input/Output (I/O) demands. Recently, numerous hardwarebased accelerations have been developed to augment GPC platforms and infrastructures, e.g., the central processing unit (CPU) and memory, to efficiently execute NFs. This article comprehensively surveys hardware-accelerated platforms and infrastructures for executing softwarized NFs. This survey covers both commercial products, which we consider to be enabling technologies, as well as relevant research studies. We have organized the survey into the main categories of enabling technologies and research studies on hardware accelerations for the CPU, the memory, and the interconnects (e.g., between CPU and memory), as well as custom and dedicated hardware accelerators (that are embedded on the platforms); furthermore, we survey hardware-accelerated infrastructures that connect GPC platforms to networks (e.g., smart network interface cards). We find that the CPU hardware accelerations have mainly focused on extended instruction sets and CPU clock adjustments, as well as cache coherency. Hardware accelerated interconnects have been developed for on-chip and chip-to-chip connections. Our comprehensive up-to-date survey identifies the main trade-offs and limitations of the existing hardware-accelerated platforms and infrastructures for NFs and outlines directions for future research.

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Section: ) Optical Interconnectsmentioning

confidence: 99%

Hardware-Accelerated Platforms and Infrastructures for Network Functions: A Survey of Enabling Technologies and Research Studies

2020

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“…erefore, this interconnection mode cannot meet the high-capacity communication requirements of multicore processors. To solve these problems, an optical waveguide is proposed to complete the information transmission between the inner cores [9][10][11]. Optical waveguides have the advantages of large capacity, low delay, and low energy consumption [12].…”

Section: Introductionmentioning

confidence: 99%

Modeling and Performance Analysis of a Fault-Tolerant 3D Photonic Network-on-Chip Based on Hybrid Photonics–Plasmonics

Zhixun

et al. 2022

Computational Intelligence and Neuroscience

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The performance of electro-optic modulators and optical routers and their routing algorithms are the key factors affecting the performance of networks on optical chips. This paper improves the mesh 3-dimensional photonic network-on-chip (3D-PNoC) topology. An SPP hybrid silicon-based electro-optic modulator and an improved fault-tolerant SPP router are used to improve the performance of the network on an optical chip. SPP switching and SPP MRR are combined to form a fault-tolerant SPP router. On this basis, an improved genetic optimization routing algorithm is implemented on the improved mesh 3D PNoC topology, which completes the data exchange of the IP core of the network on the optical chip. Compared with the case of traditional optoelectronic devices, the performance of on-chip optical networks can be improved effectively. The simulation results show that upon the application of the improved genetic optimization routing algorithm to the improved mesh 3D PNoC topology, the average end-to-end delay is reduced by 32.9%, the throughput rate is increased by 28.5%, and the system power consumption is reduced by 27.6%. On the other hand, the average insertion loss and noise of optical routers are increased by 2.94 dB and 2.95 dB, respectively.

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“…Another DBA algorithms aim to minimize bandwidth waste using improved reporting of unused or inconsistent bandwidths, influencing wavelengths assignment, scheduling and polling processes [14]. Statistical 8-node × 8-wavelength multiplexing based on a simple arbitration has been designed in two-layer on-chip architecture [15]. Reinforcement learning predictive strategies are investigated to detect fast PON environmental changes [16].…”

mentioning

confidence: 99%

Dynamic Bandwidth Allocation for C-Band Shared FBG Sensing and Telecommunications

Cibira

Glesk

Dubovan

2022

IEEE Internet Things J.

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The telecommunications data transfer in singlemode (SM) optical fiber (OF) of a passive optical network (PON) is managed by dynamic bandwidth allocation (DBA). In most internet of things (IoT) sensor network applications, both raw sensing signals and telecommunication data are transmitted in SM OFs, too. At the present time, this is not done in a shared SM OF. This paper presents a novel concept to share FBG sensing and telecommunication services (TS) in the optical C-band of the shared transmission. This concept is based on statistical detection and monitoring of fiber Bragg gratings (FBGs) sensing signals. The key steps of the proposed concept are FBG power spectral peaks statistical detection, monitoring of the FBGs dynamics and periodical estimation of TChs occupancy and availability. The proposed concept was demonstrated and validated using sensor network with a deployed group of FBG-based sensors, by implementing various static or dynamic approaches. By doing so, we achieved telecommunication channels (TChs) bandwidth availability approaching 80 %, compared to previously wasted bandwidth with availability at most 15.6 %. Experimental results showed that a DBA system with implemented dynamic TChs occupancy is a reliable way to share fiber bandwidth between both FBG sensing and TChs.

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SMONoC: Optical network-on-chip using a statistical multiplexing strategy

Cited by 11 publications

References 4 publications

Hardware-Accelerated Platforms and Infrastructures for Network Functions: A Survey of Enabling Technologies and Research Studies

Hardware-Accelerated Platforms and Infrastructures for Network Functions: A Survey of Enabling Technologies and Research Studies

Modeling and Performance Analysis of a Fault-Tolerant 3D Photonic Network-on-Chip Based on Hybrid Photonics–Plasmonics

Dynamic Bandwidth Allocation for C-Band Shared FBG Sensing and Telecommunications

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