Soft-decision Forward Error Correction in a 40-nm ASIC for 100-Gbps OTN Applications

Dave, Sameep; Esker, Lawrence; Mo, Fan; Thesling, William; Keszenheimer, James; Fuerst, R.

doi:10.1364/nfoec.2011.jwa014

Cited by 29 publications

(13 citation statements)

References 2 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Shift LDPC code also provides an efficient hardware oriented parity check matrix constraint [83]. We highlight that owing to the natural product code constraint, interconnection complexity in TPC is simpler than in most LDPC codes [84]- [86].…”

Section: Soft-decodingmentioning

confidence: 99%

See 1 more Smart Citation

Design Tradeoffs and Challenges in Practical Coherent Optical Transceiver Implementations

Morero¹,

Castrillon

Aguirre³

et al. 2016

J. Lightwave Technol.

View full text Add to dashboard Cite

This tutorial discusses the design and ASIC implementation of coherent optical transceivers. Algorithmic and architectural options and tradeoffs between performance and complexity/power dissipation are presented. Particular emphasis is placed on flexible (or reconfigurable) transceivers because of their importance as building blocks of software defined optical networks. The article elaborates on some advanced digital signal processing (DSP) techniques such as iterative decoding, which are likely to be applied in future coherent transceivers based on higher order modulations. Complexity and performance of critical DSP blocks such as the forward error correction decoder and the frequency-domain bulk chromatic dispersion equalizer are analyzed in detail. Other important ASIC implementation aspects including physical design, signal and power integrity, and design for testability, are also discussed.

show abstract

Section: Soft-decodingmentioning

confidence: 99%

“…Thus, a well structured parity check matrix not only reduces the interconnection complexity but also provides a direct way to implement rate-adaptability. In this regard, LDPC codes have been shown to provide more flexibility than TPC codes [86].…”

Section: ) Variable Code Ratesmentioning

confidence: 99%

Design Tradeoffs and Challenges in Practical Coherent Optical Transceiver Implementations

Morero¹,

Castrillon

Aguirre³

et al. 2016

J. Lightwave Technol.

View full text Add to dashboard Cite

show abstract

“…In order to meet these requirements, numerous LDPC and TP codes have been reported in the literature (e.g., see [2] and references therein). In particular, TPC based on 2 ≥ -error-correcting BCH codes (or TPC-BCH) with block sizes 32 ≥ Kbits have been used in high-speed systems to provide an acceptable tradeoff between performance and complexity [9]- [10], [20]. The feasibility of TPC-BCH for commercial applications at 100 Gbps with NCG of 11.4 ∼ dB at BER 15 = 10 − and a total overhead of 20 ∼ % has been demonstrated in [20].…”

Section: Ivb Generalized Scc With Turbo Product Codes (Tpc)mentioning

confidence: 99%

Novel serial code concatenation strategies for error floor mitigation of low-density parity-check and turbo product codes

Morero

Hueda

2013

Can. J. Electr. Comput. Eng.

View full text Add to dashboard Cite

This paper presents a novel multiple serial code concatenation (SCC) strategy to combat the error-fl oor problem in iterated sparse graph-based error correcting codes such as turbo product-codes (TPC) and low-density parity-check (LDPC) codes. Although SCC has been widely used in the past to reduce the error-fl oor in iterative decoders, the main stumbling block for its practical application in high-speed communication systems has been the need for long and complex outer codes. Alternative, short outer block codes with interleaving have been shown to provide a good tradeoff between complexity and performance. Nevertheless, their application to next-generation high-speed communication systems is still a major challenge as a result of the careful design of long complex interleavers needed to meet the requirements of these applications. The SCC scheme proposed in this work is based on the use of short outer block codes. Departing from techniques used in previous proposals, the long outer code and interleaver are replaced by a simple block code combined with a novel encoding/decoding strategy. This allows the proposed SCC to provide a better tradeoff between performance and complexity than previous techniques.Several application examples showing the benefi ts of the proposed SCC are described. Particularly, a new coding scheme suitable for high-speed optical communication is introduced.Cet article présente une nouvelle stratégie de concaténation de codes séries (SCC) multiples permettant de s'affranchir du problème de seuil d'erreur dans les codes correcteurs d'erreurs tels que les Turbo codes produits (TPC) et les codes contrôle de parité à faibles densité (LDPC). Bien que dans le passé, la SCC ait été largement utilisée pour réduire le seuil d'erreur dans les décodeurs itératifs, le principal obstacle pour son implémentation pratique dans les systèmes de communications haut débit a été le recours à des codes extérieurs longs et complexes. De courts codes en blocs extérieurs avec entrelacement ont montré qu'ils peuvent fournir un bon compromis entre la complexité et la performance. Cependant, leur implémentation dans la prochaine génération de systèmes de communications haut débit reste un défi t majeur vu que le résultat d'une conception minutieuse des entrelaceurs longs et complexes doit remplir les exigences de ces systèmes. Le schéma SCC proposé dans ce travail repose sur l'utilisation de courts codes en blocs extérieurs. Partant des techniques existantes, le code extérieur long et l'entrelaceur sont remplacés par un simple code en bloc combiné à une nouvelle stratégie de codage/ décodage. Ainsi, par comparaison aux techniques courantes, la stratégie SCC proposée fournit un meilleur compromis entre la performance et la complexité. Plusieurs exemples d'applications sont donnés et montrent les avantages de la stratégie SCC proposée. En particulier, nous présentons un nouveau schéma de codage adapté aux communications optiques haut débit.

show abstract

“…In coherent optical systems, soft information is readily available, so SD-FEC is possible. Turbo product codes (TPCs) 2 and low-density parity check (LDPC) codes 5,7 are the most commonly proposed FEC codes for such systems. Spatially-coupled (SC) LDPC codes, which provide greater NCG than block LDPC codes, have been the focus of much recent work 3,9,10 .…”

Section: Introductionmentioning

confidence: 99%

Improved Low-Power LDPC FEC for Coherent Optical Systems

Cushon

Larsson-Edefors

Andrekson

2017

2017 European Conference on Optical Communication (ECOC)

View full text Add to dashboard Cite

show abstract

Soft-decision Forward Error Correction in a 40-nm ASIC for 100-Gbps OTN Applications

Cited by 29 publications

References 2 publications

Design Tradeoffs and Challenges in Practical Coherent Optical Transceiver Implementations

Design Tradeoffs and Challenges in Practical Coherent Optical Transceiver Implementations

Novel serial code concatenation strategies for error floor mitigation of low-density parity-check and turbo product codes

Improved Low-Power LDPC FEC for Coherent Optical Systems

Contact Info

Product

Resources

About