2009 IEEE International Symposium on Parallel and Distributed Processing With Applications 2009
DOI: 10.1109/ispa.2009.100
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Software Viterbi Decoder with SSE4 Parallel Processing Instructions for Software DVB-T Receiver

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Cited by 10 publications
(4 citation statements)
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“…2 were measured. In this paper we do not address issues related to the channel decoding, which is computationally demanding, but also well described in some other works [1214].…”
Section: Computational Complexitymentioning
confidence: 99%
“…2 were measured. In this paper we do not address issues related to the channel decoding, which is computationally demanding, but also well described in some other works [1214].…”
Section: Computational Complexitymentioning
confidence: 99%
“…On the other hand, even state-of-theart PC can occur to be too slow to perform real-time reception of certain kinds of signals. This is why efforts are undertaken to measure execution time of particular operations performed in PC-based SDR systems [1], [2], [3], as well as to optimize some computationally demanding routines [4].…”
Section: Introductionmentioning
confidence: 99%
“…Alternative microprocessors like Central Processor Unit (CPU) are more flexible than FPGAs/ASICs. Some works on CPUbased software decoding use single-instruction multiple-data (SIMD) instruction sets to achieve parallel decoding [4] [5]. But restricted by their computation resources, the data processing speed and decoding throughputs are much lower.…”
Section: Introductionmentioning
confidence: 99%