Special Session: A Call to Standardize Chip-let Interconnect Testing

Chakravarty, S.

doi:10.1109/vts52500.2021.9794149

2022 IEEE 40th VLSI Test Symposium (VTS) 2022

DOI: 10.1109/vts52500.2021.9794149

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Special Session: A Call to Standardize Chip-let Interconnect Testing

S. Chakravarty

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Cited by 5 publications

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Effective and Efficient Test and Diagnosis Pattern Generation for Many Inter-Die Interconnects in Chiplet-Based Packages

Chuang

Lorenzelli

Chakravarty

et al. 2023

2023 IEEE International 3D Systems Integration Conference (3DIC)

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Special Session: A Call to Standardize Chip-let Interconnect Testing

Cited by 5 publications

References 2 publications

Effective and Efficient Test and Diagnosis Pattern Generation for Many Inter-Die Interconnects in Chiplet-Based Packages

Effective and Efficient Test and Diagnosis Pattern Generation for Many Inter-Die Interconnects in Chiplet-Based Packages

Test and Repair Improvements for UCIe

Generating Test Patterns for Chiplet Interconnects: Achieving Optimal Effectiveness and Efficiency

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