Structure Fortification of Mixed CNT Bundle Interconnects for Nano Integrated Circuits Using Constraint-Based Particle Swarm Optimization

Pathade, Takshashila; Agrawal, Yash; Parekh, Rutu; Kumar, Mekala Girish

doi:10.1109/tnano.2021.3058760

Cited by 22 publications

(13 citation statements)

References 36 publications

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“…The power taken by the procedure during the implementation was observed to get the basic cost of command. The debate about the deconstruction of observed into stationary and non-stationary elements was neglected [15]. It was seen that cross effects could be ruled out due to a minimal impact on daily expenditure, which wasn't the situation with the particular platform employed in this study, that in some instances surpasses the initial expenses many times, depending on such impact.…”

Section: Background To the Energy Prediction Modelsmentioning

confidence: 87%

Power Prediction of VLSI Circuits Using Machine Learning

Poovannan¹,

Karthik²

2023

Computers, Materials &Amp; Continua

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The difference between circuit design stage and time requirements has broadened with the increasing complexity of the circuit. A big database is needed to undertake important analytical work like statistical method, heat research, and IR-drop research that results in extended running times. This unit focuses on the assessment of test strength. Because of the enormous number of successful designs for current models and the unnecessary time required for every test, maximum energy ratings with all tests cannot be achieved. Nevertheless, test safety is important for producing trustworthy findings to avoid loss of output and harm to the chip. Generally, effective power assessment is only possible in a limited sample of pre-selected experiments. Thus, a key objective is to find the experiments that might give the worst situations again for testing power. It offers a machine-based circuit power estimation (ML-CPE) system for the selection of exams. Two distinct techniques of predicting are utilized. Firstly, to find testings with power dissipation, it forecasts the behavior of testing. Secondly, the change movement and energy data are linked to the semiconductor design, identifying small problem areas. Several types of algorithms are utilized. In particular, the methods compared. The findings show great accuracy and efficiency in forecasting. That enables such methods suitable for selecting the worst scenario.

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Section: Background To the Energy Prediction Modelsmentioning

confidence: 87%

Power Prediction of VLSI Circuits Using Machine Learning

Poovannan¹,

Karthik²

2023

Computers, Materials &Amp; Continua

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“…Input: Y pdn = Y p×p×f , Y m×f , Z t , N, r 1 , r 2 and r 3 Output: Z obj , C, P 1: N = 100; ε = 0.1; P = 5 ; T = 5; ρ = 0.01; c = 0.5 ; 2: Randomly generate N particles, calculate the fitness value of each particle and set initial radius to r 0 3: For SLPSO, sort all the particles from the worst to thalgorithme best fitness value; 4: FEs = FEs + N; 5: while F Es ≤ maxF Es do the worst to best. 33: end while Output: Z obj = max(Z eq (1,1), where…”

Section: Slpso-arsmentioning

confidence: 99%

“…As due to the dimensions of transistors/switching devices in nanoscale leads to a very narrow design margins; these nano devices based Integrated Circuits (ICs) have to deal with a number of signal integrity problems, including surface roughness, electromagnetic interference (EMI) effects, crosstalk, and reflection. Studying how interconnect affects system performance in terms of SI and PI is therefore very crucial [1], [2], [3], [4].…”

Section: Introductionmentioning

confidence: 99%

Large-Scale Optimization of Decoupling Capacitors Using Adaptive Region Based Encoding Scheme in Particle Swarm Optimization

Junjariya

Tripathi

2022

IEEE Open J. Nanotechnol.

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Power delivery networks are responsible for supplying clean power to the integrated circuits. Power supply noise plays a critical role in determining the performance of high-speed very large scale integration circuits and systems. In order to maintain power integrity in high-speed systems, decoupling capacitors are used to maintain low impedance of the PDN to eventually minimize power supply noise. However, the discrete optimization problem of selecting decoupling capacitors becomes computationally challenging in the systems having stringent PI requirements. In this work, a novel approach using the Social-Learning Particle Swarm Optimization (SLPSO) technique along with Adaptive Region Search (ARS) is used to tackle the Large-Scale Optimization Problem (LSOP) of decoupling capacitor placement. Region Search (RS) is used to guide particles, followed by ARS to dynamical search for the local best positions and for particles to move faster across the search space while maintaining the diversity of the population. To demonstrate the proposed approach, three practical case studies are presented. The obtained results are compared with current state-of-the-art approaches. The proposed approach drastically reduces computation time and is consistent with better results than other approaches. This consistency of improvement in CPU time in the results of all the examples validates the proposed approach.

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“…The interconnects within the Nano Integrated Circuits face several SI issues such as crosstalk, reflection, EMI effects, surface roughness, etc. [10] [11] [12] [13]. Therefore, there is a strong need to study the effects of interconnect on system performance in terms of SI and PI.…”

Section: Introductionmentioning

confidence: 99%

Efficient Selection and Placement of In-Package Decoupling Capacitors Using Matrix-Based Evolutionary Computation

Jain

Vaghasiya

Tripathi

2021

IEEE Open J. Nanotechnol.

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In the era of advanced nanotechnology where billions of transistors are fabricated in a single chip, high-speed operations are challenging due to packaging related issues. In High-Speed Very Large Scale Integration (VLSI) systems, decoupling capacitors are essentially used in power delivery networks to reduce power supply noise and to maintain a low impedance of the power delivery networks. In this paper, the cumulative impedance of a power delivery network is reduced below the target impedance by using state-of-the-art metaheuristic algorithms to choose and place decoupling capacitors optimally. A Matrix-based Evolutionary Computing (MEC) approach is used for efficient usage of metaheuristic algorithms. Two case studies are presented on a practical system to demonstrate the proposed approach. A comparative analysis of the performance of state-of-the-art metaheuristics is presented with the insights of practical implementation. The consistency of results in both the case studies confirms the validity of the proposed appraoch.

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Structure Fortification of Mixed CNT Bundle Interconnects for Nano Integrated Circuits Using Constraint-Based Particle Swarm Optimization

Cited by 22 publications

References 36 publications

Power Prediction of VLSI Circuits Using Machine Learning

Power Prediction of VLSI Circuits Using Machine Learning

Large-Scale Optimization of Decoupling Capacitors Using Adaptive Region Based Encoding Scheme in Particle Swarm Optimization

Efficient Selection and Placement of In-Package Decoupling Capacitors Using Matrix-Based Evolutionary Computation

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