Synthesis Method and FPGA Realization of Quasi-barker Codes

Abstract

The paper considers the method of obtaining quasi-Barker codes based on numerical ruler-bundles. Their advantages, basic parameters and areas of application are given. The algorithm is implemented on FPGA EP3C16F484N6 of Altera firm. The functional diagram of the DS-SS system using quasi-barker codes is presented, Quasi-Barker codes generator, implemented in VHDL language and its simulation in frequency domain was described.