Synthesis of threshold logic gates to nanoelectronics

Abstract

In this paper, a novel method to identify threshold logic functions (TLF) is proposed. Threshold logic is a promising alternative to conventional Boolean logic that has been recently revisited due to the suitability to emerging technologies, such as QCA, RTD, SET, TPL and spintronics. Identification and synthesis of TLF are fundamental tasks for the development of circuit design flow based on such logic style. The proposed method exploits both the order of Chow parameters and the system of inequalities, extracted from a function, to assign optimal variable weights and optimal threshold value. It is the first heuristic algorithm that does not uses integer linear programming (ILP) able to identify all threshold functions with up to five variables. Moreover, it also identifies more functions than other related heuristic methods when the number of variables is higher than five. The proposed algorithm is scalable, since the average execution time is less than 1 ms per function. Furthermore, the method always assigns the minimum weights, resulting in circuits with minimum area.

Reliability Evaluation of Rooftop Solar Photovoltaics Using Coherent Threshold Systems

“…In passing, we note that there are many methods for the identification and synthesis of threshold Boolean functions [37][38][39][40][41][42][43][44][45][46], i.e., for determining whether a given Boolean (switching) function is threshold or not, and, if it is such, selecting appropriate (albeit non-unique) values for its weights and threshold. The two methods reported herein are just two representative methods that seem to be suitable for reliability applications pertaining to coherent threshold systems.…”

Logic Synthesis for Emerging Technologies

“…the number of gates, in order to produce the final solution with minimum cost. In order to identify whether the Boolean function created from such an association is TLF, the method adopts the heuristic method proposed in [38]. This approach presents improved results in terms of TLG count when compared to previous approaches.…”

Semi-custom NCL Design with Commercial EDA Frameworks: Is it Possible?

“…To define the NCL gate that implements a specific BVF, we start with a typical logic function that is understood by CAD tools. Next, we use the method proposed by Neutzling et al in [23] to identify the TLF. For instance, assume the example function used in [23]: Q = A(B + C).…”

“…Next, we use the method proposed by Neutzling et al in [23] to identify the TLF. For instance, assume the example function used in [23]: Q = A(B + C). Table I shows the associated truth table.…”