System and Circuit Level Design and Analysis of a 16-Bit Sigma-Delta ADC for a TETRA-2 Network Mobile Station Application

Lota, Jaswinder; Al-Janabi, M.; Kale, I.

doi:10.1109/imtc.2008.4547119

2008 IEEE Instrumentation and Measurement Technology Conference 2008

DOI: 10.1109/imtc.2008.4547119

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System and Circuit Level Design and Analysis of a 16-Bit Sigma-Delta ADC for a TETRA-2 Network Mobile Station Application

Jaswinder Lota¹,

M. Al-Janabi

I. Kale

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System and Circuit Level Design and Analysis of a 16-Bit Sigma-Delta ADC for a TETRA-2 Network Mobile Station Application

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References 9 publications

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