System-on-a-chip methodology for telecom applications

Abstract

A I3 S T R A C TThis puper presetits a methodology Jor Jysletti-on-chip upplicaiiorr developnient. The complexity of such systems requires a series of development stages where the designer has to capture system requirements through formal specification languages, select the appropriute architectural platform f o r iniplementitig the final system realization, provide detailed design for hardware arid software parts, and finally validate the system under development before the actual implenienration. The proposed design ,frumework leads ,from specification down to implementation, where a virtual prototype. is produced as the last stage of system design.