Systematic method for synthesising purely delay-insensitive circuits

Huang, Chun-Kai; Jesshope, Chris; Nedelchev, Ivailo

doi:10.1049/ip-e.1993.0039

IEE Proceedings E (Computers and Digital Techniques)

1993

DOI: 10.1049/ip-e.1993.0039

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Systematic method for synthesising purely delay-insensitive circuits

Chun-Kai Huang

Chris Jesshope

Ivailo Nedelchev

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Systematic method for synthesising purely delay-insensitive circuits

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References 6 publications

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