Temperature dependence of analogue/RF performance, linearity and harmonic distortion for dual‐material gate‐oxide‐stack double‐gate TFET

Abstract

This article presents an investigation report of the effects of temperature variation in the range of 300 to 480 K on electrical performance parameters of conventional dualmaterial double-gate tunnel field effect transistor (DMDG-TFET) and dual-material gateoxide-stack double-gate tunnel field effect transistor (DMGOSDG-TFET). This report shows an analysis and comparison of the impacts of operating temperature variation on both the devices in terms of DC, analogue/RF, linearity and harmonic distortion parameters with the help of simulation results obtained using a numerical device simulator. It could be stated that DMGOSDG-TFET is more insensitive with respect to temperature variation in terms of DC, analogue/RF and linearity performances as compared to conventional DMDG-TFET. Moreover, in terms of harmonic distortion characteristics DMGOSDG-TFET is found to be more stable with temperature variation as compared to DMDG-TFET.This is an open access article under the terms of the Creative Commons Attribution License, which permits use, distribution and reproduction in any medium, provided the original work is properly cited.

Temperature Sensitivity Analysis of Dual Material Stack Gate Oxide Source Dielectric Pocket TFET

“…The energy bandgap of the semiconductor material decreases as temperature increases, influencing device characteristics accordingly. The energy bandgap variation with temperature can be formulated using the equation [29], [31]…”

“…A stack gate oxide approach (low-k/high-k stack gate oxide i.e. SiO 2 /Hf O 2 stack) is used to provide better quality oxide/channel interface which enhances the ON-state current [29]. The entire length of the stack gate (L G ) is considered 50 nm with SiO 2 oxide layer thickness of (0.8 nm) and Hf O 2 oxide layer thickness of (1.2 nm) [19].…”

“…In addition to the above issues, performance variation with temperature is also one of the major causes of concern in TFETs. Several studies [26]- [29] have reported temperature dependence performance of various TFET structures.…”

Impact of Interface Trap Charges and Temperature on the Performance of Extended Source Double Gate TFET

“…At the sourcechannel junction, the maximum electric field occurs. Therefore, maximum tunneling takes place in this region, as the band-to-band tunneling (BTBT) rate (G BT BT ) at the source-channel junction relies on the local electric field (ε) leading to an increase in the inter-band tunneling rate according to the following equation [39].…”

Temperature Sensitivity Analysis of Extended Source Double Gate Tunnel Field Effect Transistor

“…In addition to the above issues, temperature-induced performance variation is also one of the major causes of concern in TFETs. Few works of literature [28][29][30][31] have reported the temperature sensitivity of different TFETs in terms of various performance parameters. Since the temperature induced performance variation in the device depends on the design, therefore, to improve the device reliability, a stack gate oxide (SiO 2 +Hf O 2 ) is applied, which makes the device less sensitive to various interface trap charges [32].…”