Template architectures for highly scalable, many-core Heterogeneous SoC: Could-of-Chips

Exploring the security landscape: NoC-based MPSoC to Cloud-of-Chips

“…The most important aspect of the Cloud-of-Chips(CoC) architecture is the extensive scalability; the approach can be applied to any system size: from small systems (few dozens of functional blocks) up to large systems with thousands of blocks. Our novel architecture is referred as CoC [1], in analogy to the unlimited scalability of cloud computing paradigm. The CoC concept refers to large amounts of interconnected ICs and IC cores which can have different communication speeds and hierarchy levels.…”

SSPSoC: A Secure SDN-Based Protocol over MPSoC

“…The CoC design contains a Printed Circuit Board (PCB) of multiple ICs where each IC contains scalable Processing Clusters (PCs). Each PC comprises a combination of High Performances (HP) and Low Power (LP) cores and thus enables a heterogeneous system architecture [2]. The on-chip data communication is managed by Network on Chip (NoC) [3], which supports regular interconnected topologies, such as MESH, TORUS, etc.…”

“…In order to manage the routing on CoC with multiple ICs, the size of routing tables will be large enough not to be accommodated on ordinary NoC routers. The memory overhead for routing tables will grow by 2 * units where 2 is the number of PCs on each IC and k is the number of IC on each PCB. Therefore, in order to achieve secure communication among PCs and ICs on CoC but also to manage the traffic of the network with an efficient manner, the Software Defined Networking (SDN) technology [5] could be adopted.…”