The 2D SEM: A novel high-performance and low-power mesh-based topology for networks-on-chip

Abstract

In this paper, a 2D shuffle-exchange based mesh topology, or 2D shuffle-exchange mesh (SEM) for short, is presented for network-on-chips. The proposed 2D topology applies the conventional well-known shuffle-exchange structure in each row and each column of the network. Compared to an equal sized mesh which is the most common topology in on-chip networks, the proposed shuffle-exchange based mesh network has smaller diameter but for an equal cost. Finally for better performance cross-shuffle is proposed. Simulation results show that the 2D SEM and 2D cross-shuffle effectively reduce the power consumption and improve performance metrics of the on-chip networks compared to the conventional mesh topology.

The 2D digraph-based NoCs: attractive alternatives to the 2D mesh NoCs

“…For example, 3D VLSI technologies can be used for implementing 2-D digraph-based meshes [8,10]. Also, nodes at the edges of the digraphs can be inter-connected to reduce the diameter and average inter-node distance of the network.…”