16th Design Automation Conference 1979
DOI: 10.1109/dac.1979.1600091
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The CMU Design Automation System - An Example of Automated Data Path Design

Abstract: This paper illustrator* tho methodology of the CMU Design Automation System by presenting, an automated design of the PDP-8/E data palhs from a functional description. This automated clnsign (using synthesis techniques) is compared both to DECV, implementation and the Intersil single chip implementation. 1, IntroductionAG it is becoming possible to integrate larger numbers of logic components on a single chip, the need for more powerful design aide is becoming apparent. Indeed, these aids must be capable of su… Show more

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Cited by 32 publications
(5 citation statements)
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“…A pioneering HLS tool was developed at Carnegie Mellon university (called CMU Design automation or CMU-DA), which accepted the behavioral description as ISPL (Instruction Set Processor Language). It is then transformed into an IR data-flow called the Value Trace before developing RTL level implementation [177].…”
Section: Hls: a Brief Retrospectionmentioning
confidence: 99%
“…A pioneering HLS tool was developed at Carnegie Mellon university (called CMU Design automation or CMU-DA), which accepted the behavioral description as ISPL (Instruction Set Processor Language). It is then transformed into an IR data-flow called the Value Trace before developing RTL level implementation [177].…”
Section: Hls: a Brief Retrospectionmentioning
confidence: 99%
“…A pioneering HLS tool, Carnegie-Mellon University design automation (CMU-DA), was built by researchers at Carnegie Mellon University in the 1970s [30], [72]. In this tool, the design is specified at behavior level using the instruction set processor specification (ISPS) language [4].…”
Section: A Early Effortsmentioning
confidence: 99%
“…One of the pioneering groups was at Carnegie Mellon University, with early work by Dan Siewiorek, Don Thomas, Mario Barbacci, Alice Parker, and others. This research focused on design specification, simulation, and synthesis at both the RTL and algorithmic levelÀ Àfor example, see the work of Parker and colleagues 3 À Àusing input languages such as ISP (Instruction Set Processor), ISPL (Instruction Set Processor Language), and ISPS (Instruction Set Processor Specification).…”
Section: Prehistory: Generation 0 (1970s)mentioning
confidence: 99%