The use of delay lines in a ring-oscillator-based combined true random number generator

Jessa, M.; Matuszewski, Łukasz

doi:10.1109/icses.2012.6382232

Cited by 12 publications

(8 citation statements)

References 14 publications

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“…The combined RBG using ROs with the delay τ realized with carry chain logic is worse for all f L . Simultaneously, the same generator produces sequences that pass NIST tests for all sampling frequencies and K significantly smaller than that reported in the literature [38]. It basically indicates that a deterministic component of the accumulated jitter is responsible for the very good statistical properties at the output of this type combined RBG.…”

Section: Assessing the Amount Of Randomness And Pseudo-randomnessmentioning

confidence: 74%

“…The price of greater frequency granulation are greater resources used by the FPGA [38]. From a cryptography perspective, the amount of resources devoted to random bit generation is not critical for most of the cryptographic systems because the basic goal is security of the system.…”

Section: The Use Of Carry4 As Delay τmentioning

confidence: 99%

“…Its modification, discussed in [35] and [38] ex- ploits as τ latches but it still assumes that the number of latches is the same for the all source generators. The differences in nominal frequencies of ROs result only from technological differences and the length of the connections between elements of each RO.…”

Section: B Combined Ro-based Rbgmentioning

confidence: 99%

“…The continuous generation of random numbers leads to an undesirable waste of power and simplifies attacks against the RBG. Figures 6-8 present the values of m min for the combined RBG with τ implemented as two inverters, one latch and a delay line with different values [38].…”

Section: Assessing the Amount Of Randomness And Pseudo-randomnessmentioning

confidence: 99%

“…During this attack, a certain number of ROs lock to frequencies injected into the power supply, eliminating the independence of the generators and significantly reducing the randomness of the output bit stream. A method for eliminating this weakness of the RO-based combined RBG was proposed in 2012 in conference paper [38]. In this paper, we describe wider this method and propose its modification.…”

Section: Introductionmentioning

confidence: 99%

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Producing Random Bits with Delay-Line-Based Ring Oscillators

Jessa¹,

Matuszewski²

2013

International Journal of Electronics and Telecommunications

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Abstract-One of the sources of randomness for a random bit generator (RBG) is jitter present in rectangular signals produced by ring oscillators (ROs). This paper presents a novel approach for the design of delays used in these oscillators. We suggest using delay elements made on carry4 primitives instead of series of inverters or latches considered in the literature. It enables the construction of many high frequency ring oscillators with different nominal frequencies in the same field programmable gate array (FPGA). To assess the unpredictability of bits produced by RO-based RBG, the restarts mechanism, proposed in earlier papers, was used. The output sequences pass all NIST 800-22 statistical tests for smaller number of ring oscillators than the constructions described in the literature. Due to the number of ROs with different nominal frequencies and the method of construction of carry4 primitives, it is expected that the proposed RBG is more robust to cryptographic attacks than RBGs using inverters or latches as delay element.

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Section: Assessing the Amount Of Randomness And Pseudo-randomnessmentioning

confidence: 74%

Section: The Use Of Carry4 As Delay τmentioning

confidence: 99%