Three‐stage nested‐Miller‐compensated operational amplifiers: Analysis, design, and optimization based on settling time

Aminzadeh, Hamed

doi:10.1002/cta.663

Cited by 21 publications

(15 citation statements)

References 24 publications

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“…To gain more insight into the operation of this ampli¯er, it is worth mentioning that the settling response is generally comprised of two sections: nonlinear (slewing) and linear (small-signal). 8,9,12,16 For this ampli¯er during nonlinear section, MOSCAPs alter in accordance with output. This makes slewing a function of the output voltage as opposed to a conventional design that experiences a constant slew-rate (SR).…”

Section: Mosfet-only Ampli¯ers With Cascode Compensationmentioning

confidence: 91%

“…8,13 Beside pole-splitting when inserting C C , 6 the current bu®ers further stabilize the ampli¯er by pushing nondominant poles to higher frequencies. 12 PCDMs are used to realize the compensation capacitors of this topology. In the presence of nonlinear PCDMs, the key point to design a useful ampli¯er is to preserve the circuit balance.…”

Section: Depletion-mode Moscaps: C{ {V Modelmentioning

confidence: 99%

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Mosfet-Only Two-Stage Operational Amplifiers With Miller Compensation: Design and Fabrication in Nano-Scale Cmos

Aminzadeh

2013

J CIRCUIT SYST COMP

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Nano-scale area-e±cient MOS devices are employed in this article to stabilize high-speed operational ampli¯ers (opamps) for those applications that deal with negative feedback. As an alternative choice, metal-insulator-metal (MIM) capacitors cannot be integrated in every technology as they require additional process masks. Moreover, these components su®er from large silicon area. In this paper, considerations of a successful MOSFET-only ampli¯er design are highlighted and described. These considerations make it possible to fabricate these ampliers for a nano-scale digital system-on-chip (SoC). Circuit-level simulations include comparison between MOS capacitors (MOSCAPs) with MIM capacitors (MIMCAPs) in two identical processes. The e±ciency of the given design considerations are also validated through simulation in 90-nm CMOS technology. A MOSFET-only ampli¯er is designed as the main part of a 5 MS/s sample-and-hold. Using the proposed design techniques, the MOSFET-only ampli¯er with Miller compensation recovers 51% silicon die with respect to a MIMCAP ampli¯er for identical signal-to-noise-plus-distortion (SNDR) ratio.

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Section: Mosfet-only Ampli¯ers With Cascode Compensationmentioning

confidence: 91%

Section: Depletion-mode Moscaps: C{ {V Modelmentioning

confidence: 99%

Mosfet-Only Two-Stage Operational Amplifiers With Miller Compensation: Design and Fabrication in Nano-Scale Cmos

Aminzadeh

2013

J CIRCUIT SYST COMP

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“…The worst-case settling time (t S ) is divided to large-signal slewing period, t LS , which depends on SR and step amplitude (V Step ), and small-signal quasi-linear period t SS that is a function of the GBW. It can be therefore calculated as 10,14,32…”

Section: Slew Rate and Settling Timementioning

confidence: 99%

Dual loop cascode‐Miller compensation with damping factor control unit for three‐stage amplifiers driving ultralarge load capacitors

Aminzadeh

Dashti

2018

Circuit Theory & Apps

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An area-efficient amplifier topology is presented for three-stage amplifiers driving ultralarge load capacitor with reduced power consumption. It contains two high-speed ac feedback loops made from embedded current buffers and smallsize compensation capacitors, which pushes the nondominant complex poles to very high frequencies. To further improve the stability, a local impedance damping block is embedded. At the higher frequencies, it suppresses the high resistive property at the second-stage output, thereby increasing the damping factor of the complex poles and improving the overall gain margin. For identical bandwidth, the overall silicon area of the on-chip compensation capacitor is therefore decreased, leading to enhanced small-signal and large-signal performance metrics. Coined dual loop cascode-Miller compensation with damping factor control unit, the effectiveness of the proposed approach is investigated through simulation results in 90-nm complementary metal-oxide-semiconductor (CMOS) technology. An implementation based on the proposed technique consumes a quiescent current of 17 μA from a 1.2 V voltage supply. For a load capacitance equal to 560 pF, it achieves a gain-bandwidth frequency of 4.34 MHz, an average slew-rate of 1.72 V/μs, and an average settling time of 0.52 μs, when the overall compensation capacitance is set to 1.55 pF. The proposed design can supply the load capacitors up to 35 nF.

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“…Its small‐signal equivalent circuit is shown in Figure (b). The voltage gain of this three‐stage configuration has previously been analysed by op‐amp designers and can be approximated as:

\frac{V_{italicout} (s)}{V_{italicin} (s)} ≅ \frac{g_{1} R_{1} g_{2} R_{2} g_{3} R_{3} (1 - \frac{s C_{K}}{g_{3}} - \frac{s^{2} C_{K} C}{g_{2} g_{3}})}{(1 + s g_{3} R_{3} g_{2} R_{2} R_{1} C) \cdot (1 + \frac{s C_{K} (g_{3} - g_{2})}{g_{2} g_{3}} + \frac{s^{2} C_{K} C_{3}}{g_{2} g_{3}})}

where g i , R i and C i represent the small‐signal transconductance, the output resistance and the output capacitance of the i‐th stage (i = 1,2,3) of the circuit, respectively; C K is the frequency compensation capacitance. Note, that C 3 also includes possible load capacitance.…”

Section: Voltage Integratormentioning

confidence: 99%

“…Its small-signal equivalent circuit is shown in Figure 4(b). The voltage gain of this threestage configuration has previously been analysed by op-amp designers [26][27][28][29] and can be approximated as:…”

Section: Frequency Compensationmentioning

confidence: 99%

0.5‐V bulk‐driven OTA and its applications

Kulej

2013

Circuit Theory & Apps

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Summary A new 0.5‐V bulk‐driven operational transconductance amplifier (OTA), designed in 50 nm CMOS technology, is presented in the paper. The circuit is characterized by improved linearity and dynamic range obtained for MOS devices operating in moderate inversion region. Some basic applications of the OTA such as a voltage integrator and a second‐order low‐pass filter have also been described. The filter is compared to other low‐voltage filters presented in the literature. Copyright © 2013 John Wiley & Sons, Ltd.

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Three‐stage nested‐Miller‐compensated operational amplifiers: Analysis, design, and optimization based on settling time

Cited by 21 publications

References 24 publications

Mosfet-Only Two-Stage Operational Amplifiers With Miller Compensation: Design and Fabrication in Nano-Scale Cmos

Mosfet-Only Two-Stage Operational Amplifiers With Miller Compensation: Design and Fabrication in Nano-Scale Cmos

Dual loop cascode‐Miller compensation with damping factor control unit for three‐stage amplifiers driving ultralarge load capacitors

0.5‐V bulk‐driven OTA and its applications

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