2016 IEEE 21st International Mixed-Signal Testing Workshop (IMSTW) 2016
DOI: 10.1109/ims3tw.2016.7524228
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Timing measurement BOST architecture with full digital circuit and self-calibration using characteristics variation positively for fine time resolution

Congbing Li
1
,
Junshan Wang
2
,
Haruo Kobayashi
3
et al.
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Cited by 7 publications
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References 9 publications
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SAR TDC Architecture with Self-Calibration Employing Trigger Circuit

Ozawa
1
,
Ida
2
,
Jiang
3
et al. 2017
2017 IEEE 26th Asian Test Symposium (ATS)
8
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SAR TDC Architecture with Self-Calibration Employing Trigger Circuit

Ozawa
1
,
Ida
2
,
Jiang
3
et al. 2017
2017 IEEE 26th Asian Test Symposium (ATS)
8
0
0
0
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Time-to-Digital Converter with Pseudo-Segmented Delay Line

Kwiatkowski
1
,
Szplet
2
2019
2019 IEEE International Instrumentation and Measurement Technology Conference (I2MTC)
5
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0
0
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Analog / mixed-signal circuit design based on mathematics

Kobayashi
1
,
Lin
2
2016
2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT)
5
0
0
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