Tolerating multiple faults with proximate manifestations in FPGA-based critical designs for harsh environments

Abstract

Field-Programmable Gate Arrays (FPGA) have proven their value over time as final implementation targets. Their sin gular architecture renders them sensitive to a wide range of faults, specially to those causing multiple and non-simulta neous errors, that can result in silent data corruption and also in structural changes in the hardware implementation. This papers presents and tests an approach to enable the confi dent use of conventional (low-cost) FPGAs in hostile envi ronments. The design combines spatial and temporal redun dancy with partial dynamic reconfiguration to increase the resilience of designs. The goal is to tolerate the occurrence of single and multiple faults, even during the reconfigura tion process of FPGAs, while minimizing the impact of the recovery process on system availability. Fault injection tech niques are used to experimentally evaluate various features of the approach. Results are very promising and lead us to state that, although many research is still required, the old idea of self-repairing HW designs is closer today.

New Fault Detection, Mitigation and Injection Strategies for Current and Forthcoming Challenges of HW Embedded Designs

“…• Tolerating multiple faults with proximate manifestations in FPGAbased critical designs for harsh environments [51], which is published in the Conference on Field Programmable Logic and Applications, 2012. This work focused in providing coverage for faults occurred while the system is undergoing a recovery, avoiding failures and maximizing availability.…”