ToPoliNano: NanoMagnet Logic Circuits Design and Simulation

Vacca, Marco; Frache, Stefano; Graziano, Mariagrazia; Riente, Fabrizio; Turvani, Giovanna; Roch, Massimo Ruo; Zamboni, Maurizio

doi:10.1007/978-3-662-43722-3_12

Cited by 12 publications

(15 citation statements)

References 55 publications

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“…In Figure 5, a comparison in terms of number of crossings is shown between the original Barycenter algorithm (the one we proposed in [18] [? ], [17] to be clear) and the improved one presented here and combined with the Breadth-First Search algorithm. The test circuit is an N-bit ripple carry adder, where the number of bits varies from 1 to 30 bits.…”

Section: Hdl Graph Optimization: Cross-wire Minimization Techniquesmentioning

confidence: 97%

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Physical design and testing of Nano Magnetic architectures

Turvani

Tohti

Bollo

et al. 2014

2014 9th IEEE International Conference on Design &Amp; Technology of Integrated Systems in Nanoscale Era (DTIS)

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Nano-Magnetic Logic (NML) is a promising candidate to substitute CMOS technology since it is characterized by very low power consumption and it can combine computation and memory in the same device. Several works analyze this technology at device level; nevertheless a higher level analysis is required to fully understand its potentials. It is actually fundamental to analyze how an architecture of realistic complexity can be really implemented taking into account the physical limits due to technology, and which performance it could consequently reach.We present here a physical design and test methodology based on our tool ToPoliNano, which allows analyzing circuits using models specifically targeted for this technology. We developed an automatic engine for placing and routing combinational NML circuits including as constraints realistic rules due to currently available fabrication processes. After the place and route phase, ToPoliNano also allows to perform a circuit logical simulation, detailed at the single nanomagnet level. Furthermore this tool has the ability to analyze and test circuits based on NML, considering the impact that process variations and faults have on the logical behavior of the circuit.

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Section: Hdl Graph Optimization: Cross-wire Minimization Techniquesmentioning

confidence: 97%

“…As a consequence we have always used behavioral models based on VHDL language [14] as a way to simulate complex circuits. Recently, we have started the development of a dedicated tool for design and analysis of NML circuits called ToPoliNano [17] [18]. This tools allows to design circuits following the top-down approach of CMOS technology.…”

Section: Introductionmentioning

confidence: 99%

Physical design and testing of Nano Magnetic architectures

Turvani

Tohti

Bollo

et al. 2014

2014 9th IEEE International Conference on Design &Amp; Technology of Integrated Systems in Nanoscale Era (DTIS)

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“…ToPoliNano (Torino Politecnico Nanotechnology) is a CAD tool developed by the VLSI Group of Politecnico di Torino. The aim of this project is to create a new set of methodologies and a tool to help researchers to study emerging technologies.…”

Section: Modeling and Implementationmentioning

confidence: 99%

Efficient and reliable fault analysis methodology for nanomagnetic circuits

Turvani

Riente

Cairo

et al. 2016

Circuit Theory & Apps

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Summary The increasing issues in scaled Complementary Metal Oxide Semiconductor (CMOS) circuit fabrication favor the flourishing of emerging technologies. Because of their limited sizes, both CMOS and emerging technologies are particularly sensitive to defects that arise during the fabrication process. Their impact is not easy to analyze in order to take the necessary countermeasures, especially in the case of circuits of realistic complexity based on emerging technologies. In this work, we propose a new methodology supported by an efficient and reliable tool for the identification of the impact of faults in complex circuits implemented using the emerging technology we are focusing on in this case: nanomagnetic logic. The methodology is based on three main steps: (i) we performed exhaustive physical‐level simulations of basic blocks based on a detailed finite‐element tool in order to have a full characterization, to know their properties in presence of defects, and to have a solid reference point for the following steps; (ii) we developed a model (fanomag) for the basic block behavior suitable for simulations in presence of defects of complex circuits, that is, lighter than a physical level one, but accurate enough to capture the most important features to be inherited at circuit level; (iii) starting from a physical design of complex circuits that we perform using a specific design tool we developed, that is, ToPoliNano, we simulated using fanomag, now embedded in our ToPoliNano tool, the behavior of circuits in presence of multiple sets of fabrication defects using a Monte Carlo approach now included in ToPoliNano as a new feature. In this paper, a specific type of defect is considered as a case study. The framework and methodology are conceived to be easily extended to handle other types of defects and problems due to working conditions that a designer and/or a technologist might want to focus on. The major outcome is then a powerful methodology and tool capable to analyze with a good accuracy nanomagnetic logic complex circuits and architectures both in ideal conditions and in presence of defects with remarkable performance in terms of simulation times. Copyright © 2016 John Wiley & Sons, Ltd.

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“…The particular circuits structure derived by this solution leads to the definition of a limited amount of possible basic structures, defined as "Standard Cells" [21] [12], that we adopt in this work. This predefined set of Standard Cells can be easily used to design circuits both with custom layout and using automated tools [22][23] [24] greatly enhancing the development of NML technology.…”

Section: Introductionmentioning

confidence: 99%

“…The simulation method is based on a set of Standard Cells described with an accurate model and can be easily used to build any kind of circuits. Moreover this simulation environment can be easily integrated in ToPoliNano [24], our design tool for NML circuits.…”

Section: Introductionmentioning

confidence: 99%

Modeling, Design, and Analysis of MagnetoElastic NML Circuits

Giri

Vacca

Causapruno

et al. 2016

IEEE Trans. Nanotechnology

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With the predicted end of CMOS scaling process, researchers started to study several alternative technologies. Among them NanoMagnet Logic (NML) offers advantages complementary to MOS transistors especially for its magnetic nature. Its intrinsic memory capability makes it suitable for zero stand-by power and logic-in-memory applications. NML requires a clock system that, if based on a magnetic field, highly increases the circuit dynamic power consumption. We have recently proposed a solution based on the magnetoelastic effect (ME-NML) [1] and on currently available fabrication processes, which drastically reduces dynamic power consumption. However, many questions still remain unanswered. Which kind of applications are best suited for this technology? How can we effectively design, analyze and compare ME-NML circuits? Does it really offer advantages over state-of-the-art CMOS transistors? In this paper we provide answers to all these questions and the results prove that this technology offers indeed extremely good performance. We have designed a Galois Field Multiplier with a systolic array structure to reduce interconnection overhead. We developed a new RTL model that allows us to easily describe and simulate circuits of any complexity, evaluating at the same time the performance and keeping into account technology constraints. We approach for the first time in the NML scenario the design of ME-NML circuits adopting the standardcell method used in standard technologies and fulfill the design down to the physical level. The same circuit is designed also with NML technology based on magnetic fields and with a 28 nm low power CMOS bulk technology for comparison. The CMOS circuit is obtained through physical place&route with a commercial tool, providing therefore the most accurate comparison ever presented in literature. Power analysis shows that ME-NML circuits have a considerable advantage over both NML and state of the art CMOS bulk technology. As a further by-product results clearly highlight which kind of architectures can better exploit the true potential of NML technology.

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ToPoliNano: NanoMagnet Logic Circuits Design and Simulation

Cited by 12 publications

References 55 publications

Physical design and testing of Nano Magnetic architectures

Physical design and testing of Nano Magnetic architectures

Efficient and reliable fault analysis methodology for nanomagnetic circuits

Modeling, Design, and Analysis of MagnetoElastic NML Circuits

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