Toward an analog VLSI implementation of a decision making model

Abstract

This paper describes an analog circuit implementation of on-chip learning for the Lens Model by using Adaptive Linear Neuron networks (ADALINE). The on-chip learning circuit has been designed using MOS transistors operating in the subthreshold regime. The proposed circuit has been developed and simulated using the CMOS 1.5gm AMI ABN process. The parameters of the correlation coefficient equation are current signals that can be controlled through the voltages to produce the square root behavior. The circuit is biased at 1.5V to lower the power dissipation. Spice simulations are included to illustrate the circuit performance.