2015
DOI: 10.1109/tasc.2014.2368354
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Towards 32-bit Energy-Efficient Superconductor RQL Processors: The Cell-Level Design and Analysis of Key Processing and On-Chip Storage Units

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Cited by 27 publications
(15 citation statements)
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“…s st em = at e + int er connect (1) Table 5 shows the JJ-complexity of some commonly used logic blocks. For validation, we compare our method of evaluating JJcomplexity against published designs that use foundry RQL standard cell library based on foundry models and observe that our estimates are within 12% of the numbers reported in prior work [4,16].…”
Section: Modeling Area Using Jj-complexitymentioning
confidence: 79%
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“…s st em = at e + int er connect (1) Table 5 shows the JJ-complexity of some commonly used logic blocks. For validation, we compare our method of evaluating JJcomplexity against published designs that use foundry RQL standard cell library based on foundry models and observe that our estimates are within 12% of the numbers reported in prior work [4,16].…”
Section: Modeling Area Using Jj-complexitymentioning
confidence: 79%
“…Other demonstrated circuits include shift registers, small arithmetic circuits, transmission driver systems, and serial data receiver systems [12][13][14][15]. Design and resource estimates exist for 32-bit and 64-bit integer and floating-point arithmetic and logical units, register file, on-chip storage components, bloom filters [4,16,17]. Table 1 compares the energy-efficiency of typical operations in 16-nm CMOS and superconducting technology.…”
Section: C) Circuit Schematicmentioning
confidence: 99%
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