2009 International Conference on Field Programmable Logic and Applications 2009
DOI: 10.1109/fpl.2009.5272255
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Towards a unique FPGA-based identification circuit using process variations

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Cited by 30 publications
(23 citation statements)
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“…It effectively utilizes the available circuit resources which otherwise would have been unused, because the implementation of a simple RO with five to seven delay elements will still occupy a complete CLB. In this way redundancy is achieved with a 100% resource utilization compared to the 1-out-of-k method [1] and the method of averaging [17].…”
Section: Configurable Ro (Cro) Techniquementioning
confidence: 99%
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“…It effectively utilizes the available circuit resources which otherwise would have been unused, because the implementation of a simple RO with five to seven delay elements will still occupy a complete CLB. In this way redundancy is achieved with a 100% resource utilization compared to the 1-out-of-k method [1] and the method of averaging [17].…”
Section: Configurable Ro (Cro) Techniquementioning
confidence: 99%
“…Yu et al proposed a reliabilityimprovement technique in pre-quantization phase of the RO-PUF [17]. However, we will show in Sect.…”
Section: Related Workmentioning
confidence: 99%
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“…Each cell produces a single bit, or occasionally a few bits. This includes memory-based designs, such as the SRAM PUF [16], as well as the coating PUF [25] and a subset of the large number of ring oscillator-based designs, e.g., [29]. The most prominent entropy-degrading effects for such PUFs are bias and spatial correlations.…”
Section: Physically Unclonable Functionsmentioning
confidence: 99%