Towards lightweight satisfiability solvers for self-verification

A Time Leap Challenge for SAT Solving

“…Works on targeted algorithm engineering for SAT-solvers are extensive. Just to name a few examples, there is work on exploiting features such as optimizing memory footprints for the architecture [10], on implementing cache-aware [13], on using huge pages [22], on how to benefit from parallel solving [35] or employing inprocessing. Inprocessing particularly takes advantage of modern hardware as one can execute much more instructions on a modern CPU than accessing bytes on memory [31,51].…”

“…Of course, the advancements in hardware and algorithms cannot be separated entirely. Targeted algorithm engineering can make use of new hardware features [10,13,22,39] and hardware development can be guided by the specific demands of modern algorithms. We are well aware that this can quickly end up in comparing apples and oranges.…”

Verifying next generation electronic systems

“…The concept of self-verification as well as some results based on this concept have been presented in [22], [23], [24], [25].…”