Tradeoff analysis and optimization of power delivery networks with on-chip voltage regulation

Zeng, Zhiyu; Ye, Xiaoji; Feng, Zhuo; Li, Peng

doi:10.1145/1837274.1837483

Cited by 54 publications

(47 citation statements)

References 10 publications

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“…Efficiency is one of the key design metrics for the on-chip DC-DC converters [2], [8]. We now analyze the inefficiency and power loss in a SC converter.…”

Section: Power Loss Analysismentioning

confidence: 99%

Optimization of on-chip switched-capacitor DC-DC converters for high-performance applications

Zhou

Choi

Kim

et al. 2012

Proceedings of the International Conference on Computer-Aided Design

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Abstract-On-chip switched-capacitor (SC) DC-DC converters have recently been demonstrated in silicon for high-performance applications such as multicore processors. The efficiency of the power delivery system using SC converters is a major concern, but this has not been addressed at the system level in prior research. This work develops models for the efficiency of such a system as a function of size and layout of the SC converters, and proposes an approach to optimize the size and layout of the SC converter to minimize power loss. The efficiency of these techniques is demonstrated on both homogenous and heterogenous multicore chips.

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“…Efficiency is one of the key design metrics for the on-chip DC-DC converters [2], [8]. We now analyze the inefficiency and power loss in a SC converter.…”

Section: Power Loss Analysismentioning

confidence: 99%

Optimization of on-chip switched-capacitor DC-DC converters for high-performance applications

Zhou

Choi

Kim

et al. 2012

Proceedings of the International Conference on Computer-Aided Design

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show abstract

“…Recently, Zeng et al [17] proposed an optimization technique for designing power networks with multiple on-chip voltage regulators. The design tradeoffs of on-chip voltage regulators and the effect of these regulators on high frequency voltage fluctuations and mid-frequency resonance have been analyzed.…”

Section: Introductionmentioning

confidence: 99%

“…The design tradeoffs of on-chip voltage regulators and the effect of these regulators on high frequency voltage fluctuations and mid-frequency resonance have been analyzed. The interactions between the power supplies and the decoupling capacitors are, however, not considered, which can significantly affect the performance of an integrated circuit [17]. These interactions are quite critical in producing a robust power distribution network [10].…”

Section: Introductionmentioning

confidence: 99%

Design methodology to distribute on-chip power in next generation integrated circuits

Köse

Friedman

2012

2012 IEEE 27th Convention of Electrical and Electronics Engineers in Israel

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Abstract-The performance of an integrated circuit depends strongly upon the power delivery network. With the introduction of ultra-small on-chip voltage regulators, novel design methodologies are needed to determine the location of these on-chip power supplies and decoupling capacitors. In this paper, the optimal location of the power supplies and decoupling capacitors is determined for different size and number of components. Optimization algorithms widely used for facility location problems are applied in the proposed methodology. The effect of the size, number, and location of the power supplies and decoupling capacitors on the power noise is also discussed.

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“…Recently, Zeng et al [18] proposed an optimization technique for designing power networks with multiple on-chip voltage regulators. The design tradeoffs of on-chip voltage regulators and the effect of these regulators on high frequency voltage fluctuations and mid-frequency resonance have been analyzed.…”

Section: Introductionmentioning

confidence: 99%

“…The design tradeoffs of on-chip voltage regulators and the effect of these regulators on high frequency voltage fluctuations and mid-frequency resonance have been analyzed. The interactions between the power supplies and the decoupling capacitors are, however, not considered, which can significantly affect the performance of an integrated circuit [18]. These interactions are quite critical in producing a robust power distribution network [10].…”

Section: Introductionmentioning

confidence: 99%

Distributed power delivery for energy efficient and low power systems

Köse

Friedman

2012

2012 Conference Record of the Forty Sixth Asilomar Conference on Signals, Systems and Computers (ASILOMAR)

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Abstract-With the introduction of ultra-small on-chip voltage regulators, novel design methodologies are needed to determine the location of these on-chip power supplies and decoupling capacitors. In this paper, the optimal location of the power supplies and decoupling capacitors is determined for different size and number of components. Facility location problems are applied to determine the optimum location of power supplies and decoupling capacitors in the proposed methodology.

show abstract

Tradeoff analysis and optimization of power delivery networks with on-chip voltage regulation

Cited by 54 publications

References 10 publications

Optimization of on-chip switched-capacitor DC-DC converters for high-performance applications

Optimization of on-chip switched-capacitor DC-DC converters for high-performance applications

Design methodology to distribute on-chip power in next generation integrated circuits

Distributed power delivery for energy efficient and low power systems

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