2014 24th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) 2014
DOI: 10.1109/patmos.2014.6951871
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Tuning software-based fault-tolerance techniques for power optimization

Abstract: Soft errors are a major concern in aerospace applications. Software-based fault-tolerance techniques offer several advantages to increase the reliability of these applications if a microprocessor or microcontroller is utilized. However, the protection of the data-flow im plies data and instruction redundancy which brings significant increment in execution time and memory transfers and consequently increases the power consumption. Hence, for those systems that combines high reliability with severe time and powe… Show more

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Cited by 4 publications
(3 citation statements)
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“…Prior works have also employed different transformation rules 1 to provide data-flow protection [24,25]. In particular, several techniques have been proposed by using different combinations of the transformation rules [26], and they are compared in terms of error detection rate, execution time, and memory footprint. A hybrid method by combining the transformation rules [24] with a hardware hardening technique has been proposed in [27].…”
Section: Related Workmentioning
confidence: 99%
“…Prior works have also employed different transformation rules 1 to provide data-flow protection [24,25]. In particular, several techniques have been proposed by using different combinations of the transformation rules [26], and they are compared in terms of error detection rate, execution time, and memory footprint. A hybrid method by combining the transformation rules [24] with a hardware hardening technique has been proposed in [27].…”
Section: Related Workmentioning
confidence: 99%
“…All of this work demonstrated that dynamic adjusting the processor's voltage and frequency can effectively reduce system energy consumption. However, recent researches have illustrated that scaling the processor's voltage and frequency has negative impact of nanoscale semiconductor circuits's cosmic ray radiations, electromagnetic interference, and alpha particles, which enforce the unreliability of processor [22][23][24]. Thus, it is a good way to incorporate the reliability into energy aware scheduling based on DVFS.…”
Section: Related Workmentioning
confidence: 99%
“…Here, we introduce a novel objective as RE, which can get good tradeoff among these metrics. We first redefine task V earliest execution finish time on processor at frequency , as , , ) , (22) where RO(V , , ) is the reliability overhead of task V on processor at frequency , and is computed by…”
Section: Task Assignment Phasementioning
confidence: 99%