Unified parallel lattice structures for time-recursive discrete cosine/sine/Hartley transforms

Liu, K.J.R.; Chiu, C.T.

doi:10.1109/78.205735

Cited by 80 publications

(21 citation statements)

References 29 publications

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“…The -transform of (29) is denoted as After recursive cycles of IIR filtering computation, the output is obtained. The input-folding formula for (25) is expressed as (30) where (31) The recursive formula for (30) is written as (32) where…”

Section: B Input-folding Recursive Structurementioning

confidence: 99%

Direct Recursive Structures for Computing Radix-<tex>$r$</tex>Two-Dimensional DCT/IDCT/DST/IDST

Chen

Liu

Yang

2004

IEEE Trans. Circuits Syst. I

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In this paper, new recursive structures for computing radix-two-dimensional (2-D) discrete cosine transform (DCT) and 2-D inverse DCT (IDCT) are proposed. The 2-D DCT/IDCT are first decomposed into cosine-cosine and sine-sine transforms. Based on indexes of transform bases, the regular pre-addition preprocess is established and the recursive structures for 2-D DCT/IDCT, which can be realized in a second-order infinite-impulse response (IIR) filter, are derived without involving any transposition procedure. For computation of 2-D DCT/IDCT, the recursive loops of the proposed structures are less than that of one-dimensional DCT/IDCT recursive structures, which require data transposition to achieve the so-called row-column approach. With advantages of fewer recursive loops and no transposition, the proposed recursive structures achieve more accurate results and less power consumption than the existed methods. The regular and modular properties are suitable for very large-scale integration (VLSI) implementation. By using similar procedures, the recursive structures for 2-D DST and 2-D IDST are also proposed. Index Terms-Discrete cosine transform (DCT), fast algorithm, inverse DCT (IDCT), multidimensional signal processing, recursive structure.

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Section: B Input-folding Recursive Structurementioning

confidence: 99%

Direct Recursive Structures for Computing Radix-<tex>$r$</tex>Two-Dimensional DCT/IDCT/DST/IDST

Chen

Liu

Yang

2004

IEEE Trans. Circuits Syst. I

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“…Unlike the conventional DCT coder design using matrix factorization, we adopt the time-recursive DCT [21], [22] which is able to simultaneously generate type-II DCT and discrete sine transform (DST) coefficients-and needed to compute the pseudo-phase function. Furthermore, in real-time video signal processing, the data arrive serially.…”

Section: A Two-stage Look-ahead Type-ii Dct/idct Codermentioning

confidence: 99%

“…Our interest, on the other hand, is to apply this technique to compensate the speed loss due to lowered supply voltage or to simply speed-up the design under normal condition. The pseudo-phase functions and of integer-pel displacements can be obtained by solving the following system equation [10] for (21) where is the integer-pel displacement and is the pseudo-phase vector. For illustration purpose, the pseudo-phase computation module in the original design is shown in Fig.…”

Section: Multirate Design For Pseudo-phase Computationmentioning

confidence: 99%

Low-power architectures for compressed domain video coding co-processor

Chen¹,

Liu

2000

IEEE Trans. Multimedia

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Low power as a de facto is one of the most important criteria for many signal-processing system designs, particularly in multimedia cellular applications and multimedia system on chip design. There have been many approaches to achieve this design goal at many different implementation levels ranging from very-large-scale-integration fabrication technology to system design. In this paper, the multirate low-power design technique will be used along with other methods such as look-ahead, pipelining in designing cost-effective low-power architectures of compressed domain video coding co-processor. Our emphasis is on optimizing power consumption by minimizing computational units along the data path. We demonstrate both low-power and high-speed can be accomplished at algorithm/architecture level. Based on the calculation and simulation results, the design can achieve significant power savings in the range of 60%-80% or speedup factor of two at the needs of users.Index Terms-Compressed domain video coding, DCT, low-power architecture, motion estimation.

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“…Therefore, the periodicity property is satisfied. Since both member functions of the kernel group appear in the decomposition (11), the lattice architecture is recommended (cf. Fig.…”

Section: Architecture For Modulated Lapped Transformmentioning

confidence: 99%

<title>Time-recursive computation and real-time parallel architectures, with application on the Modulated Lapped Transform</title>

1993

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The time-recursive computation has been proved particularly useful for the real-time evaluation of one and two-dimensional block transforms. Unlike the FFT based ones, time-recursive architectures require only local cornmunication. Also, they are modular and regular, thus they are very appropriate for VLSI implementation and they allow high degree of parallelism.In this paper, we establish an architectural framework for parallel time-recursive computation. We consider a class of linear operators that consists of the discrete time, time invariant, compactly supported, but otherwise arbitrary kernel functions. We specify the properties of the linear operators that can be implemented efficiently in a time-recursive way. Based on these properties, we develop a routine that produces a time-recursive architectural implementation for a given operator. This routine is instructive for the design of a CAD tool that will facilitate the architecture derivation.Using this background, we design an architecture for the Modulated Lapped Transform (commonly called Modifled Discrete Cosine Transform), which has linear cost in operator counts.

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Unified parallel lattice structures for time-recursive discrete cosine/sine/Hartley transforms

Cited by 80 publications

References 29 publications

Direct Recursive Structures for Computing Radix-<tex>$r$</tex>Two-Dimensional DCT/IDCT/DST/IDST

Direct Recursive Structures for Computing Radix-<tex>$r$</tex>Two-Dimensional DCT/IDCT/DST/IDST

Low-power architectures for compressed domain video coding co-processor

<title>Time-recursive computation and real-time parallel architectures, with application on the Modulated Lapped Transform</title>

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Unified parallel lattice structures for time-recursive discrete cosine/sine/Hartley transforms

Cited by 80 publications

References 29 publications

Direct Recursive Structures for Computing Radix-&lt;tex&gt;$r$&lt;/tex&gt;Two-Dimensional DCT/IDCT/DST/IDST

Direct Recursive Structures for Computing Radix-&lt;tex&gt;$r$&lt;/tex&gt;Two-Dimensional DCT/IDCT/DST/IDST

Low-power architectures for compressed domain video coding co-processor

<title>Time-recursive computation and real-time parallel architectures, with application on the Modulated Lapped Transform</title>

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Product

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Direct Recursive Structures for Computing Radix-<tex>$r$</tex>Two-Dimensional DCT/IDCT/DST/IDST

Direct Recursive Structures for Computing Radix-<tex>$r$</tex>Two-Dimensional DCT/IDCT/DST/IDST