2011 International Symposium on Integrated Circuits 2011
DOI: 10.1109/isicir.2011.6131889
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Variability-aware automated sizing of analog circuits considering discrete design parameters

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Cited by 4 publications
(1 citation statement)
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“…Refs. [9][10][11][12] present methods for yield estimation by linearizing the performance in worst-case scenarios, which could introduce errors. Refs.…”
Section: Introductionmentioning
confidence: 99%
“…Refs. [9][10][11][12] present methods for yield estimation by linearizing the performance in worst-case scenarios, which could introduce errors. Refs.…”
Section: Introductionmentioning
confidence: 99%