Variation-tolerant Cu_xSi_yO-based RRAM for low power application

Abstract

An embedded Non-Volatile Resistive Memory IP with low power and high reliability is presented for application in RFID tags. The logic-based Cu x Si y O resistive RAM employs a 2-transistor-2-resistor (2T2R) cell structure to reduce process variation and expand sensing margin. The feedback mechanism is adopted in the write process to prevent power consumption. A 64 Kb RRAM IP is embedded in RFID tag test chip in 0.13 µm logic process. Test results indicate that 6X margin is attained in resistance distribution at worst case and 22.2 µW program power is achieved, which demonstrates the low power and variation-tolerant robustness.

A single-poly EEPROM with low leakage charge pump and peripheral circuits for passive RFID tag in a standard CMOS technology

“…Although some new type NVMs, such as ferroelectric RAM (FeRAM) and resistive RAM (RRAM), have advantages on chip area and power consumption [1,2], it requires a special process which would increase cost. Electrically erasable programmable read-only memory (EEPROM) is most widely adopted for its CMOS compatibility and reliability [3,4].…”