2017
DOI: 10.1109/led.2016.2628813
|View full text |Cite
|
Sign up to set email alerts
|

Via Resistance Reduction in Advanced Copper Interconnects

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
3
2

Citation Types

1
5
0

Year Published

2019
2019
2023
2023

Publication Types

Select...
6
1

Relationship

0
7

Authors

Journals

citations
Cited by 15 publications
(6 citation statements)
references
References 7 publications
1
5
0
Order By: Relevance
“…In this work, we consider several representative Co via structures and calculate the spin-dependent electron transmission across each interface structure. First, we consider the simple Co/TaN/Co and Co/Ta/Co interface structures, which are analogues of the Cu-based barrier metal schemes involving either TaN or Ta diffusion barriers [51]. TaN is taken to be hexagonal and Ta is taken to be body-centered cubic (BCC), which are consistent with previous analyses for Cu vias [46,48].…”
Section: Vertical Resistance At Co/metal/co Interfacesmentioning
confidence: 99%
See 1 more Smart Citation
“…In this work, we consider several representative Co via structures and calculate the spin-dependent electron transmission across each interface structure. First, we consider the simple Co/TaN/Co and Co/Ta/Co interface structures, which are analogues of the Cu-based barrier metal schemes involving either TaN or Ta diffusion barriers [51]. TaN is taken to be hexagonal and Ta is taken to be body-centered cubic (BCC), which are consistent with previous analyses for Cu vias [46,48].…”
Section: Vertical Resistance At Co/metal/co Interfacesmentioning
confidence: 99%
“…Thus, whenever an electron travels from one level of horizontal interconnect wiring to an adjacent level of interconnect wiring, it must travel through this thin metallic layer. In Cu interconnects, the presence of thin metallic layers at the bottom of vias results in dramatic increases in vertical resistance at narrow interconnect dimensions [46,48,51].…”
Section: Vertical Resistance At Co/metal/co Interfacesmentioning
confidence: 99%
“…Through-silicon vias (TSVs) are vertical conductive structures used to connect ICs or MEMS devices on the top surface of a silicon wafer with others at the bottom of the same wafer, or to use the wafer as interposer layer between two separate substrates. TSVs increase functional density and device performance while reducing interconnection-related parasitic effects [1][2][3][4][5]. Increasing interest has been recently directed toward the possibility of using TSVs at extreme cryogenic temperatures.…”
Section: Introductionmentioning
confidence: 99%
“…The detrimental properties of Cu result in a significant risk of an unintentional contamination of active structures in modern microelectronics. As a solution to prevent a Cu contamination, mitigating measures—e.g., tantalum diffusion barriers—were proposed . Platinum is often considered as a protection and a diffusion barrier in multilayer contact pads .…”
Section: Introductionmentioning
confidence: 99%
“…As a solution to prevent a Cu contamination, mitigating measures-e.g., tantalum diffusion barriers-were proposed. [2,3] Platinum is often considered as a protection and a diffusion barrier in multilayer contact pads. [4,5] An understanding of copper-platinum-related electrically active defects in Si is not only important from a scientific point of view, but it also has some technological relevance.…”
Section: Introductionmentioning
confidence: 99%