Vivado HLS-based implementation of a fall detection decision core on an FPGA platform

Abdelhedi, Sahar; Baklouti, Mouna; Bourguiba, Riad; Mouine, J.

doi:10.1109/idt.2016.7843025

Cited by 3 publications

(7 citation statements)

References 8 publications

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“…The final design consumes lower LUT resources than [67,68], and final optimised design in [47] with 17.63%, 18.43% and 26.29% of the LUT resource consumption of the designs, respectively. While our final design consumes higher LUT resources at 167% and 292% of [50,51] respectively, but has 10% higher sensitivity and 2.9% higher specificity than both the designs. The first design iteration design I of our proposed system can be utilised for low area/resource consumption and consumes the second lowest LUT resources of all the designs in Table 7 with only [51] consuming 2% less resources.…”

Section: Hardware System Resultsmentioning

confidence: 85%

“…While our final design consumes higher LUT resources at 167% and 292% of [50,51] respectively, but has 10% higher sensitivity and 2.9% higher specificity than both the designs. The first design iteration design I of our proposed system can be utilised for low area/resource consumption and consumes the second lowest LUT resources of all the designs in Table 7 with only [51] consuming 2% less resources. Design II also consumes low resources in Table 7 with [51] consuming 10.9% less resources.…”

Section: Hardware System Resultsmentioning

confidence: 85%

“…The processing of entire window segment with arithmetic trees results in a higher throughput and an effective latency of 0.1 µs/sample with 128 sample bursts of data streaming into the proposed hardware design. The latest works in [66,67] have a higher latency of 1 s, while [47,50,51] have latencies in microseconds, however they suffer form lower classification performance. Furthermore, the proposed system also consumes relatively low to moderate resources over all hardware implementations from design I to final design, which allows flexibility in performance and area trade-off requirements for processing.…”

Section: Hardware System Resultsmentioning

confidence: 99%

“…The first design iteration design I of our proposed system can be utilised for low area/resource consumption and consumes the second lowest LUT resources of all the designs in Table 7 with only [51] consuming 2% less resources. Design II also consumes low resources in Table 7 with [51] consuming 10.9% less resources. Design III and IV are placed in the middle of Table 7, in terms of LUT resource consumption, lower than [67,68], but higher than [50,51].…”

Section: Hardware System Resultsmentioning

confidence: 99%

“…All the processing is performed in software on the ARM core, while only the detection decision is sent to the programmable logic for fall detection indication (blinking LEDs). The work was further expanded in [51] by implementing a hardware core for the above mentioned operations in programmable logic on a Zybo FPGA board. To the best of our knowledge, this is the first implementation of a fractal feature accelerator using multi-level DWT for classification of falls from ADL.…”

Section: Related Workmentioning

confidence: 99%

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Hardware/Software Co-Design of Fractal Features Based Fall Detection System

Tahir

Morison

Skelton

et al. 2020

Sensors

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Falls are a leading cause of death in older adults and result in high levels of mortality, morbidity and immobility. Fall Detection Systems (FDS) are imperative for timely medical aid and have been known to reduce death rate by 80%. We propose a novel wearable sensor FDS which exploits fractal dynamics of fall accelerometer signals. Fractal dynamics can be used as an irregularity measure of signals and our work shows that it is a key discriminant for classification of falls from other activities of life. We design, implement and evaluate a hardware feature accelerator for computation of fractal features through multi-level wavelet transform on a reconfigurable embedded System on Chip, Zynq device for evaluating wearable accelerometer sensors. The proposed FDS utilises a hardware/software co-design approach with hardware accelerator for fractal features and software implementation of Linear Discriminant Analysis on an embedded ARM core for high accuracy and energy efficiency. The proposed system achieves 99.38% fall detection accuracy, 7.3× speed-up and 6.53× improvements in power consumption, compared to the software only execution with an overall performance per Watt advantage of 47.6×, while consuming low reconfigurable resources at 28.67%.

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Section: Hardware System Resultsmentioning

confidence: 85%

Section: Hardware System Resultsmentioning

confidence: 85%

Section: Hardware System Resultsmentioning

confidence: 99%

Section: Hardware System Resultsmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

See 3 more Smart Citations

Hardware/Software Co-Design of Fractal Features Based Fall Detection System

Tahir

Morison

Skelton

et al. 2020

Sensors

View full text Add to dashboard Cite

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A Lightweight Deep Convolutional Neural Network Implemented on FPGA and Android Devices for Detection of Breast Cancer Using Ultrasound Images

Vinod,

Guddati,

Kumar Panda

et al. 2024

IEEE Access

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Wearable Health Devices for Diagnosis Support: Evolution and Future Tendencies

Escobar-Linero

Muñoz-Saavedra

Luna-Perejón

et al. 2023

Sensors

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The use of wearable devices has increased substantially in recent years. This, together with the rise of telemedicine, has led to the use of these types of devices in the healthcare field. In this work, we carried out a detailed study on the use of these devices (regarding the general trends); we analyzed the research works and devices marketed in the last 10 years. This analysis extracted relevant information on the general trend of use, as well as more specific aspects, such as the use of sensors, communication technologies, and diseases. A comparison was made between the commercial and research aspects linked to wearables in the healthcare field, and upcoming trends were analyzed.

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Vivado HLS-based implementation of a fall detection decision core on an FPGA platform

Cited by 3 publications

References 8 publications

Hardware/Software Co-Design of Fractal Features Based Fall Detection System

Hardware/Software Co-Design of Fractal Features Based Fall Detection System

A Lightweight Deep Convolutional Neural Network Implemented on FPGA and Android Devices for Detection of Breast Cancer Using Ultrasound Images

Wearable Health Devices for Diagnosis Support: Evolution and Future Tendencies

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