Wafer‐scale integration implementation of mesh‐connected multiprocessor systems

Abstract

SUMMARYWith recent advances in VLSI technology, WaferScale Integration implementation is becoming realistic, wherein massively parallel multiprocessors are implemented on a single wafer. As a result of this technique, the connections among VLSI become unnecessary and a high-speed, high-density system will be realized. This paper considers the mesh-connected network, which is one of the configurations of the massively parallel multiprocessor system, and discusses the reconfiguration techniques in realizing the network on the wafer. The reconfiguration technique is necessary for composing a system on a wafer, and several techniques have been proposed to date. Most of these, however, are based on global information or can be applied only to special cases. Consequently, they are not suitable for the self-reconfiguration scheme of a massively parallel system. From such a viewpoint, this paper proposes and evaluates an autonomic self-reconfiguration scheme using only local information, wherein the nondeterministic algorithm is added to the conventional method. It is seen as a result that the proposed method can realize a higher yield than the conventional method, as the array size becomes larger and the portion of the redundant PE becomes less. 1