WCET analysis of static NUCA caches

Ding, Yiqiang; Zhang, Wei

doi:10.1109/pccc.2014.7017093

Cited by 1 publication

(2 citation statements)

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“…However, all these prior research efforts only aimed at caches with uniform cache architecture (UCA), which could not be applied safely to NUCA caches with non-uniform cache access latencies. This paper is an extended work based on NUCA cache timing analysis presented in [7]. However, the work in [7] was primarily focused on dual-cores.…”

Section: Introductionmentioning

confidence: 99%

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Exploiting Static Non-Uniform Cache Architectures for Hard Real-Time Computing

Ding¹,

Zhang²

2015

Journal of Computing Science and Engineering

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High-performance processors using Non-Uniform Cache Architecture (NUCA) are increasingly used to deal with the growing wire delays in multicore/manycore processors. Due to the convergence of high-performance computing with embedded computing, NUCA caches are expected to benefit high-end embedded systems as well. However, for real-time systems that use multicore processors with NUCA caches, it is crucial to bound worst-case execution time (WCET) accurately and safely. In this paper, we developed a WCET analysis approach by considering the effect of static NUCA caches on WCET. We compared the WCET in real-time applications with different topologies of static NUCA caches. Our experimental results demonstrated that the static NUCA cache could improve the worst-case performance of realtime applications using multicore processor compared to the cache with uniform access time.

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Section: Introductionmentioning

confidence: 99%

“…This paper is an extended work based on NUCA cache timing analysis presented in [7]. However, the work in [7] was primarily focused on dual-cores. This paper studied the NUCA cache timing analysis for quadcores with different NUCA cache topologies.…”

Section: Introductionmentioning

confidence: 99%