ZnO 2 nanoparticles have been synthesized by an organometallic precursor method. The structure, structural stability, and magnetic and optical properties of ZnO 2 nanoparticles have been investigated by experiments and first-principles calculations. It is found that ZnO 2 nanoparticles decompose into ZnO at about 230°C and is stable up to 36 GPa at ambient temperature. The cubic ZnO 2 phase has a bulk modulus of B 0 ) 174 GPa at zero pressure. Nanocrystalline ZnO 2 material is an indirect semiconductor with an energy gap of about 4.5 eV and paramagnetic down to 5 K.

Triggered by the pioneering research on graphene, the family of two-dimensional layered materials (2DLMs) has been investigated for more than a decade, and appealing functionalities have been demonstrated. However, there are still challenges inhibiting high-quality growth and circuit-level integration, and results from previous studies are still far from complying with industrial standards. Here, we overcome these challenges by utilizing machine-learning (ML) algorithms to evaluate key process parameters that impact the electrical characteristics of MoS2 top-gated field-effect transistors (FETs). The wafer-scale fabrication processes are then guided by ML combined with grid searching to co-optimize device performance, including mobility, threshold voltage and subthreshold swing. A 62-level SPICE modeling was implemented for MoS2 FETs and further used to construct functional digital, analog, and photodetection circuits. Finally, we present wafer-scale test FET arrays and a 4-bit full adder employing industry-standard design flows and processes. Taken together, these results experimentally validate the application potential of ML-assisted fabrication optimization for beyond-silicon electronic materials.

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In recent years, two-dimensional (2D) semiconductors have attracted considerable attention from both academic and industrial communities. Recent research has begun transforming from constructing basic field-effect transistors (FETs) into designing functional circuits. However, device processing remains a bottleneck in circuit-level integration. In this work, a non-destructive doping strategy is proposed to modulate precisely the threshold voltage (V TH) of MoS2-FETs in a wafer scale. By inserting an Al interlayer with a varied thickness between the high-k dielectric and the Au top gate (TG), the doping could be controlled. The full oxidation of the Al interlayer generates a surplus of oxygen vacancy (Vo) in the high-k dielectric layer, which further leads to stable electron doping. The proposed strategy is then used to optimize an inverter circuit by matching the electrical properties of the load and driver transistors. Furthermore, the doping strategy is used to fabricate digital logic blocks with desired logic functions, which indicates its potential to fabricate fully integrated multistage logic circuits based on wafer-scale 2D semiconductors.