Metal organic chemical vapor deposition of GaAs on standard nominal 300 mm Si(001) wafers was studied. Antiphase boundary (APB) free epitaxial GaAs films as thin as 150 nm were obtained. The APB-free films exhibit an improvement of the room temperature photoluminescence signal with an increase of the intensity of almost a factor 2.5. Hall effect measurements show an electron mobility enhancement from 200 to 2000 cm2/V s. The GaAs layers directly grown on industrial platform with no APBs are perfect candidates for being integrated as active layers for nanoelectronic as well as optoelectronic devices in a CMOS environment.

We present a new etch chemistry that enables highly selective dry etching of germanium over its alloy with tin (Ge(1-x)Sn(x)). We address the challenges in synthesis of high-quality, defect-free Ge(1-x)Sn(x) thin films by using Ge virtual substrates as a template for Ge(1-x)Sn(x) epitaxy. The etch process is applied to selectively remove the stress-inducing Ge virtual substrate and achieve strain-free, direct band gap Ge0.92Sn0.08. The semiconductor processing technology presented in this work provides a robust method for fabrication of innovative Ge(1-x)Sn(x) nanostructures whose realization can prove to be challenging, if not impossible, otherwise.

We theoretically study and experimentally demonstrate a pseudomorphic Ge/Ge0.92Sn0.08/Ge quantum-well microdisk resonator on Ge/Si (001) as a route toward a compact GeSn-based laser on silicon. The structure theoretically exhibits many electronic and optical advantages in laser design, and microdisk resonators using these structures can be precisely fabricated away from highly defective regions in the Ge buffer using a novel etch-stop process. Photoluminescence measurements on 2.7 μm diameter microdisks reveal sharp whispering-gallery-mode resonances (Q > 340) with strong luminescence.

No abstract

The integration of III-V on silicon is still a hot topic as it will open up a way to co-integrate Si CMOS logic with photonic devices. To reach this aim, several hurdles should be solved, and more particularly the generation of antiphase boundaries (APBs) at the III-V/Si(001) interface. Density functional theory (DFT) has been used to demonstrate the existence of a double-layer steps on nominal Si(001) which is formed during annealing under proper hydrogen chemical potential. This phenomenon could be explained by the formation of dimer vacancy lines which could be responsible for the preferential and selective etching of one type of step leading to the double step surface creation. To check this hypothesis, different experiments have been carried in an industrial 300 mm MOCVD where the total pressure during the anneal step of Si (001) surface has been varied. Under optimized conditions, an APBs-free GaAs layer was grown on a nominal Si(001) surface paving the way for III-V integration on silicon industrial platform.